Wei Wu

24 papers A* 4A 2C 3Journal 7Unranked 8
YearRankTypeTitle / Venue / Authors
2017 — conf
23.9 An 8-channel 4.5Gb 180GB/s 18ns-row-latency RAM for the last level cache.
ISSCC
Tah-Kang Joseph Ting, Gyh-Bin Wang, Ming-Hung Wang, Chun-Peng Wu, Chun-Kai Wang, Chun-Wei Lo, Li-Chin Tien, Der-Min Yuan, Yung-Ching Hsieh, Jenn-Shiang Lai, Wen-Pin Hsu, Chien-Chih Huang, Chi-Kang Chen, Yung-Fa Chou, Ding-Ming Kwai, Zhe Wang, Wei Wu, Shigeki Tomishima, Patrick Stolt, Shih-Lien Lu
2015 — conf
A computer designed half Gb 16-channel 819Gb/s high-bandwidth and 10ns low-latency DRAM for 3D stacked memory devices using TSVs.
VLSIC
Pei-Wen Luo, Chi-Kang Chen, Yu-Hui Sung, Wei Wu, Hsiu-Chuan Shih, Chia-Hsin Lee, Kuo-Hua Lee, Ming-Wei Li, Mei-Chiang Lung, Chun-Nan Lu, Yung-Fa Chou, Po-Lin Shih, Chung-Hu Ke, Chun Shiah, Patrick Stolt, Shigeki Tomishima, Ding-Ming Kwai, Bor-Doou Rong, Nicky Lu, Shih-Lien Lu, Cheng-Wen Wu
2014 — conf
Entropy loss in PUF-based key generation schemes: The repetition code pitfall.
HOST
Patrick Koeberl, Jiangtao Li, Anand Rajan, Wei Wu
2013 — conf
A Spatial Majority Voting Technique to Reduce Error Rate of Physically Unclonable Functions.
INTRUST
Patrick Koeberl, Jiangtao Li, Wei Wu
2012 J jnl
A practical device authentication scheme using SRAM PUFs.
J. Cryptogr. Eng.
Patrick Koeberl, Jiangtao Li, Roel Maes, Anand Rajan, Claire Vishik, Marcin Wójcik, Wei Wu
2012 J jnl
Direct Compare of Information Coded With Error-Correcting Codes.
IEEE Trans. Very Large Scale Integr. Syst.
Wei Wu, Dinesh Somasekhar, Shih-Lien Lu
2011 — conf
A Practical Device Authentication Scheme Using SRAM PUFs.
TRUST
Patrick Koeberl, Jiangtao Li, Anand Rajan, Claire Vishik, Wei Wu
2011 J jnl
Adaptive Cache Design to Enable Reliable Low-Voltage Operation.
IEEE Trans. Computers
Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Wei Wu, Shih-Lien Lu
2011 A* conf
Energy-efficient cache design using variable-strength error-correcting codes.
ISCA
Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu
2010 A* conf
Reducing cache power with low-cost, multi-bit error-correcting codes.
ISCA
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu
2009 A* conf
Improving cache lifetime reliability at ultra-low voltages.
MICRO
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu
2008 J jnl
A Fast Architecture-Level Thermal Analysis Method for Runtime Thermal Regulation.
J. Low Power Electron.
Sheldon X.-D. Tan, Pu Liu, Lin Jiang, Wei Wu, Murli Tirumala
2008 — conf
FEKIS: a fast architecture-level thermal analyzer for online thermal regulation.
ACM Great Lakes Symposium on VLSI
Pu Liu, Sheldon X.-D. Tan, Wei Wu, Murli Tirumala
2007 J jnl
Assertion-Based Design Exploration of DVS in Network Processor Architectures
CoRR
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
2007 J jnl
Efficient power modeling and software thermal sensing for runtime temperature monitoring.
ACM Trans. Design Autom. Electr. Syst.
Wei Wu, Lingling Jin, Jun Yang, Pu Liu, Sheldon X.-D. Tan
2007 C conf
Improving the reliability of on-chip data caches under process variations.
ICCD
Wei Wu, Sheldon X.-D. Tan, Jun Yang, Shih-Lien Lu
2006 A* conf
A systematic method for functional unit power estimation in microprocessors.
DAC
Wei Wu, Lingling Jin, Jun Yang, Pu Liu, Sheldon X.-D. Tan
2006 J jnl
Fast Thermal Simulation for Runtime Temperature Tracking and Management.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pu Liu, Hang Li, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang
2006 C conf
Reduce Register Files Leakage Through Discharging Cells.
ICCD
Lingling Jin, Wei Wu, Jun Yang, Chuanjun Zhang, Youtao Zhang
2005 A conf
Assertion-Based Design Exploration of DVS in Network Processor Architectures.
DATE
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
2005 — conf
Dynamic Co-allocation of Level One Caches.
ICESS
Lingling Jin, Wei Wu, Jun Yang, Chuanjun Zhang, Youtao Zhang
2005 C conf
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management.
ICCD
Hang Li, Pu Liu, Zhenyu Qi, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang
2005 A conf
Fast thermal simulation for architecture level dynamic thermal management.
ICCAD
Pu Liu, Zhenyu Qi, Hang Li, Lingling Jin, Wei Wu, Sheldon X.-D. Tan, Jun Yang
2004 — conf
Assertion-based power/performance analysis of network processor architectures.
HLDVT
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin