Wei Wang - RankMe

58 papers A* 1A 2C 15Misc 1Journal 15Unranked 24

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Input-Independent Array Compensation in Memristor-Arrays-Based Neuromorphic Systems for Input Resistance. IEEE Trans. Circuits Syst. II Express Briefs Peiwen Tong, Wei Wang, Hui Xu, Yi Sun, Yongzhou Wang, Menglin Chen, Qingjiang Li
2024	—	`conf`	OGIG: A Botnet Detection Model Integrating Graph Structural Modeling and Time Series Analysis. ICBASE Wei Wang, Ying Yang, Yangzhi Hou, Zhaoyong Yu, Wenhao Ma
2023	J	`jnl`	A Gate Multiplexing Architecture-Based Artificial Visual Sensor and Memory System. Adv. Intell. Syst. Cen Liao, Wei Wang, Yi Sun, Yongzhou Wang, Sen Liu, Peiwen Tong, Qingjiang Li
2023	J	`jnl`	In-Sensor Reservoir Computing Based on Optoelectronic Synapse. Adv. Intell. Syst. Yi Sun, Qingjiang Li, Xi Zhu, Cen Liao, Yongzhou Wang, Zhiwei Li, Sen Liu, Hui Xu, Wei Wang
2022	J	`jnl`	Fast and Reconfigurable Logic Synthesis in Memristor Crossbar Array. Adv. Intell. Syst. Wei Wang, Sen Liu, Qingjiang Li, Tuo Shi, Feng Zhang, Haijun Liu, Nan Li, Yongzhou Wang, Yi Sun, Bing Song, Hui Xu, Qi Liu
2022	J	`jnl`	High-Speed Memristor-Based Ripple Carry Adders in 1T1R Array Structure. IEEE Trans. Circuits Syst. II Express Briefs Xingzhi Fu, Qingjiang Li, Weihe Wang, Hui Xu, Yinan Wang, Wei Wang, Hongqi Yu, Zhiwei Li
2021	—	`conf`	MAGIC-Based Nonvolatile Binary Counters. APCCAS Xingzhi Fu, Hui Xu, Yinan Wang, Wei Wang, Xi Zhu, Weihe Wang, Zhiwei Li
2019	J	`jnl`	A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs Yiming Wang, Yun Li, Haihua Shen, Dongyu Fan, Wei Wang, Ling Li, Qi Liu, Feng Zhang, Xinghua Wang, Meng-Fan Chang, Ming Liu
2012	J	`jnl`	Effects of Copper Plasticity on the Induction of Stress in Silicon from Copper Through-Silicon Vias (TSVs) for 3D Integrated Circuits. J. Electron. Test. Benjamin Backes, Colin McDonough, Larry Smith, Wei Wang, Robert E. Geer
2011	J	`jnl`	3D Integration of CMOL Structures for FPGA Applications. IEEE Trans. Computers Zine Abid, Ming Liu, Wei Wang
2011	—	`conf`	Design of a novel digital phantom for EIT system calibration. EMBC Nan Li, Wei Wang, Hui Xu
2011	J	`jnl`	FPGA Based on Integration of CMOS and RRAM. IEEE Trans. Very Large Scale Integr. Syst. Sansiri Tanachutiwat, Ming Liu, Wei Wang
2011	—	`conf`	High-speed digital-controlled variable voltage source with current monitor for EIT application. BMEI Nan Li, Hui Xu, Wei Wang, Weida Zhang
2011	C	`conf`	Performance evaluation of air-gap-based coaxial RF TSV for 3D NoC. VLSI-SoC Le Yu, Haigang Yang, Jia Zhang, Wei Wang
2011	C	`conf`	Self-test method and recovery mechanism for high frequency TSV array. VLSI-SoC Jia Zhang, Le Yu, Haigang Yang, Y. L. Xie, F. B. Zhou, Wei Wang
2010	—	`conf`	Design considerations for variation tolerant multilevel CMOS/Nano memristor memory. ACM Great Lakes Symposium on VLSI Harika Manem, Garrett S. Rose, Xiaoli He, Wei Wang
2010	A	`conf`	Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs. ICCAD Le Yu, Haigang Yang, Tom T. Jing, Min Xu, Robert E. Geer, Wei Wang
2010	C	`conf`	FPGA based on integration of memristors and CMOS devices. ISCAS Wei Wang, Tom T. Jing, Brian Butcher
2010	A*	`conf`	Reconfigurable multi-function logic based on graphene P-N junctions. DAC Sansiri Tanachutiwat, Ji Ung Lee, Wei Wang, Chun Yung Sung
2010	C	`conf`	cFPGA: CNT emerging memory-based FPGA. ISCAS Wei Wang, Tom T. Jing, Brian Butcher
2009	—	`conf`	A route towards production-worthy 5 µm × 25 µm and 1 µm × 20 µm non-Bosch through-silicon-via (TSV) etch, TSV metrology, and TSV integration. 3DIC Weng Hong Teh, Raymond Caramto, Jamal Qureshi, Sitaram Arkalgud, M. O'Brien, T. Gilday, Kou Maekawa, T. Saito, Kouichi Maruyama, Thenappan Chidambaram, Wei Wang, David Marx, David Grant, Russ Dudley
2009	—	`conf`	Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices. NanoNet Ming Liu, Haigang Yang, Sansiri Tanachutiwat, Wei Wang
2009	—	`conf`	FPGA based on integration of carbon nanorelays and CMOS devices. NANOARCH Ming Liu, Haigang Yang, Sansiri Tanachutiwat, Wei Wang
2009	C	`conf`	Monolithic Graphene Nanoribbon Electronics for Interconnect Performance Improvement. ISCAS Sansiri Tanachutiwat, Shuhong Liu, Robert E. Geer, Wei Wang
2008	—	`conf`	3D CMOL Crossnet for Neuromorphic Network Applications. NanoNet Kevin Ryan, Sansiri Tanachutiwat, Wei Wang
2008	C	`conf`	Analyzing mixed carbon nanotube bundles: A current density study. ISCAS Liwei Shang, Ming Liu, Sansiri Tanachutiwat, Wei Wang
2008	J	`jnl`	Countermeasures for Hardware Fault Attack in Multi-Prime RSA Cryptosystems. Int. J. Netw. Secur. Zine-Eddine Abid, Wei Wang
2008	—	`conf`	Exploring Multi-layer Graphene Nanoribbon Interconnects. NanoNet Sansiri Tanachutiwat, Wei Wang
2008	—	`conf`	FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications. NanoNet Ming Liu, Hua Yu, Wei Wang
2008	C	`conf`	New designs of Redundant-Binary full Adders and its applications. ISCAS Zine Abid, Wei Wang
2008	—	`conf`	rFGA: CMOS-nano hybrid FPGA using RRAM components. NANOARCH Ming Liu, Wei Wang
2007	J	`jnl`	3-D nFPGA: A Reconfigurable Architecture for 3-D CMOS/Nanomaterial Hybrid Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Chen Dong, Deming Chen, S. Haruehanroengra, Wei Wang
2007	C	`conf`	Fault Tolerance Circuit for AM-OLED. ISCAS Dayong Li, Ming Liu, Wei Wang
2007	J	`jnl`	Hardware Organization to Achieve High-Speed Elliptic Curve Cryptography for Mobile Devices. Mob. Networks Appl. Sining Liu, Brian King, Wei Wang
2007	A	`conf`	Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture. ICCAD Chen Dong, Deming Chen, Sansiri Tanachutiwat, Wei Wang
2006	C	`conf`	A CRT-RSA Algorithm Secure against Hardware Fault Attacks. DASC Sining Liu, Brian King, Wei Wang
2006	C	`conf`	An efficient adaptive interlace-to-progressive scan conversion scheme and hardware implementation. ISCAS Shahab Salehi, B. M. Handjojo, Wei Wang, Yaobin Chen
2006	C	`conf`	Elliptic curves cryptosystem implementation based on a look-up table sharing scheme. ISCAS Sining Liu, Francis Bowen, Brian King, Wei Wang
2006	C	`conf`	Exploring carbon nanotubes and NiSi nanowires as on-chip interconnections. ISCAS Chen Dong, S. Haruehanroengra, Wei Wang
2006	J	`jnl`	Hybrid Nanoelectronics: Future of Computer Technology. J. Comput. Sci. Technol. Wei Wang, Ming Liu, Andrew Hsu
2006	—	`conf`	On-Chip Interconnects and Repeaters Based on NiSi Nanowires. Nano-Net Wei Wang, Adam Maina Ari, Woon Ket Wong
2006	C	`conf`	Passive reduced-order macromodeling algorithm for structure dynamics in MEMS systems. ISCAS Rumi Zhang, Graham A. Jullien, Wei Wang, Anestis Dounavis
2005	—	`conf`	An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction. IWSOC Shaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy
2005	—	`conf`	Efficient multi-prime RSA immune against hardware fault attack. ISCAS (5) Yonghong Yang, Zine Abid, Wei Wang, Z. Zhang, C. Yang
2005	—	`conf`	Performance comparison of quantum-dot cellular automata adders. ISCAS (3) Rumi Zhang, Wei Wang, Konrad Walus, Graham A. Jullien
2005	C	`conf`	RRNS Quasi-Chaotic Coding and Its FPGA Implementation. SNPD Wei Wang, Xiaolin Zhang, Chenyang Yang, M. N. S. Swamy, M. Omair Ahmad
2005	—	`conf`	Two-prime RSA immune cryptosystem and its FPGA implementation. ACM Great Lakes Symposium on VLSI Ying Yang, Zine-Eddine Abid, Wei Wang
2004	C	`conf`	An Immune CRT-Based Three-prime RSA cryptosystem. SNPD Yonghong Yang, Zine-Eddine Abid, Wei Wang
2004	—	`conf`	Modulo deflation in (2 ISCAS (2) Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili
2004	—	`conf`	New modulo decomposed residue-to-binary algorithm for general moduli sets. ICASSP (5) Shaoqiang Bi, Wei Wang, Asim J. Al-Khalili
2004	J	`jnl`	Novel Design and Fpga Implementation of Da-rns Fir Filters. J. Circuits Syst. Comput. Wei Wang, M. N. S. Swamy, M. Omair Ahmad
2004	—	`conf`	Powder-based fabrication techniques for single-wall carbon nanotube circuits. ISCAS (3) Daniel Dai, Yehea I. Ismail, Wei Wang, Hanif M. Ladak
2004	—	`conf`	RNS Application for Digital Image Processing. IWSOC Wei Wang, M. N. S. Swamy, M. Omair Ahmad
2003	—	`conf`	Moduli selection in RNS for efficient VLSI implementation. ISCAS (4) Wei Wang, M. N. S. Swamy, M. Omair Ahmad
2002	J	`jnl`	A Parallel Residue-to-binary Converter for the Moduli Set {2m-1, 220m+1, 221m+1, ..., 22km+1}. VLSI Design Wei Wang, M. N. S. Swamy, M. Omair Ahmad, Yuke Wang
2002	—	`conf`	A new architecture of RRNS error-correcting QC encoder/decoder and its FPGA implementation. ISCAS (5) Wei Wang, M. N. S. Swamy, M. Omair Ahmad
1999	—	`conf`	A high-speed residue-to-binary converter and a scheme for its VLSI implementation. ISCAS (6) Wei Wang, M. N. S. Swamy, M. Omair Ahmad, Yuke Wang
1999	Misc	`conf`	A parallel residue-to-binary converter. ICASSP Wei Wang, M. N. S. Swamy, M. Omair Ahmad, Yuke Wang