Wei Tang - RankMe

22 papers A* 1A 1Journal 8Unranked 12

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	2.5 A 1.1mm ISSCC Cheng-Hsun Lu, Wei Tang, Jaehee Kim, Youngjoo Lee, Zhengya Zhang
2026	—	`conf`	Medusa: A Quantum-Inspired 200-Variable 1016-Clause Analog k-SAT Solver. ISSCC Luke Wormald, Ying-Tuan Hsu, Evangelos Dikopoulos, Wei Tang, Benjamin Datsko, Ali Hammoud, Zhengya Zhang, Michael P. Flynn
2025	—	`conf`	25.1 A Physics-Inspired Oscillator-Based Mixed-Signal Optimization Engine for Solving 50-Variable 218-Clause 3-SAT Problems with 100 ISSCC Evangelos Dikopoulos, Ying-Tuan Hsu, Luke Wormald, Wei Tang, Zhengya Zhang, Michael P. Flynn
2025	J	`jnl`	An 8-bit 20.7 TOPS/W Multilevel Cell ReRAM Macro With ADC-Assisted Bit-Serial Processing. IEEE J. Solid State Circuits Justin M. Correll, Lu Jie, Seungheun Song, Seungjong Lee, Junkang Zhu, Wei Tang, Luke Wormald, Jack Erhardt, Nicolas Breil, Roger Quon, Deepak Kamalanathan, Siddarth A. Krishnan, Michael Chudzik, Wei D. Lu, Zhengya Zhang, Michael P. Flynn
2025	J	`jnl`	Daedalus: A Physics-Inspired Mixed-Signal Optimization Engine With Dynamic Continuous-Time Injection for Solving 3-SAT Problems. IEEE J. Solid State Circuits Evangelos Dikopoulos, Ying-Tuan Hsu, Luke Wormald, Wei Tang, Benjamin Datsko, Zhengya Zhang, Michael P. Flynn
2025	J	`jnl`	Energy-Efficient Parallel Interconnects for Chiplet Integration. IEEE Micro Wei Tang, Chester Liu, Zhengya Zhang
2025	J	`jnl`	RXO-LDPC: A Physics-Inspired Relaxation Oscillator-Based Solver Leveraging Six-Body Spin Interactions for Soft Decoding of LDPC Codes. IEEE J. Solid State Circuits Evangelos Dikopoulos, Luke Wormald, Ying-Tuan Hsu, Wei Tang, Po-Shao Chen, Zhengya Zhang, Michael P. Flynn
2024	J	`jnl`	Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration. IEEE J. Solid State Circuits Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang
2024	A	`conf`	Design Approach for Die-to-Die Interfaces to Enable Energy-Efficient Chiplet Systems. ISLPED Vikram Jain, Wei Tang, Zuoguo Wu, Viansa Schmulbach, Yakun Sophia Shao, Zhengya Zhang, Borivoje Nikolic
2023	—	`conf`	Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm VLSI Technology and Circuits Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang
2022	—	`conf`	An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine. VLSI Technology and Circuits Justin M. Correll, Lu Jie, Seungheun Song, Seungjong Lee, Junkang Zhu, Wei Tang, Luke Wormald, Jack Erhardt, Nicolas Breil, Roger Quon, Deepak Kamalanathan, Siddarth A. Krishnan, Michael Chudzik, Zhengya Zhang, Wei D. Lu, Michael P. Flynn
2022	—	`conf`	NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging. VLSI Technology and Circuits Teyuh Chou, Wei Tang, Mihai D. Rotaru, Chester Liu, Rahul Dutta, Sharon Lim Pei Siang, David Ho Soon Wee, Surya Bhattacharya, Zhengya Zhang
2022	J	`jnl`	VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters. IEEE J. Solid State Circuits Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang
2021	J	`jnl`	A 0.58-mm IEEE J. Solid State Circuits Wei Tang, Chia-Hsiang Chen, Zhengya Zhang
2021	—	`conf`	PETRA: A 22nm 6.97TFLOPS/W AIB-Enabled Configurable Matrix and Convolution Accelerator Integrated with an Intel Stratix 10 FPGA. VLSI Circuits Sung-Gun Cho, Wei Tang, Chester Liu, Zhengya Zhang
2021	—	`conf`	VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters. VLSI Circuits Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang
2019	J	`jnl`	A 2.4-mm IEEE J. Solid State Circuits Wei Tang, Chia-Hsiang Chen, Zhengya Zhang
2019	A*	`conf`	CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm. MICRO Teyuh Chou, Wei Tang, Jacob Botimer, Zhengya Zhang
2018	—	`conf`	A 1.8Gb/s 70.6pJ/b 128×16 link-adaptive near-optimal massive MIMO detector in 28nm UTBB-FDSOI. ISSCC Wei Tang, Hemanth Prabhu, Liang Liu, Viktor Öwall, Zhengya Zhang
2018	—	`conf`	LEIA: A 2.05mm CICC Shiming Song, Wei Tang, Thomas Chen, Zhengya Zhang
2016	—	`conf`	A 0.58mm VLSI Circuits Wei Tang, Chia-Hsiang Chen, Zhengya Zhang
2015	—	`conf`	18.7 A 2.4mm ISSCC Chia-Hsiang Chen, Wei Tang, Zhengya Zhang