Wei Jiang

12 papers A* 1A 6Journal 3Unranked 2
YearRankTypeTitle / Venue / Authors
2011 J jnl
Automatic memory partitioning and scheduling for throughput and power optimization.
ACM Trans. Design Autom. Electr. Syst.
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
2011 J jnl
Pattern-Mining for Behavioral Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jason Cong, Hui Huang, Wei Jiang
2010 A conf
A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis.
DATE
Jason Cong, Hui Huang, Wei Jiang
2010 A conf
Accelerating Monte Carlo based SSTA using FPGA.
FPGA
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan, Yi Zou
2009 A conf
Automatic memory partitioning and scheduling for throughput and power optimization.
ICCAD
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
2009 J jnl
Synthesis Algorithm for Application-Specific Homogeneous Processor Networks.
IEEE Trans. Very Large Scale Integr. Syst.
Jason Cong, Karthik Gururaj, Guoling Han, Wei Jiang
2008 A conf
Pattern-based behavior synthesis for FPGA resource reduction.
FPGA
Jason Cong, Wei Jiang
2008 — conf
Scheduling with integer time budgeting for low-power optimization.
ASP-DAC
Wei Jiang, Zhiru Zhang, Miodrag Potkonjak, Jason Cong
2007 A conf
Synthesis of an application-specific soft multiprocessor system.
FPGA
Jason Cong, Guoling Han, Wei Jiang
2006 A* conf
Behavior and communication co-optimization for systems with sequential communication media.
DAC
Jason Cong, Yiping Fan, Guoling Han, Wei Jiang, Zhiru Zhang
2006 — conf
Platform-Based Behavior-Level and System-Level Synthesis.
SoCC
Jason Cong, Yiping Fan, Guoling Han, Wei Jiang, Zhiru Zhang
2006 A conf
Platform-based resource binding using a distributed register-file microarchitecture.
ICCAD
Jason Cong, Yiping Fan, Wei Jiang