Wayne P. Burleson

202 papers A* 8A 26B 1C 15Misc 6Journal 63Unranked 83

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	Gradient Approximation of Approximate Multipliers for High-Accuracy Deep Neural Network Retraining. DATE Chang Meng, Wayne P. Burleson, Weikang Qian, Giovanni De Micheli
2025	J	`jnl`	Gradient Estimation Methods of Approximate Multipliers for High-Accuracy Retraining of Deep Learning Models. CoRR Chang Meng, Wayne P. Burleson, Giovanni De Micheli
2025	—	`conf`	Integrated Security Mechanisms for Weight Protection in Memristive Crossbar Arrays. ASAP Muhammad Faheemur Rahman, Wayne P. Burleson
2025	J	`jnl`	Integrated Security Mechanisms for Weight Protection in Memristive Crossbar Arrays. CoRR Muhammad Faheemur Rahman, Wayne P. Burleson
2025	J	`jnl`	Laser Fault Injection in Memristor-Based Accelerators for AI/ML and Neuromorphic Computing. CoRR Muhammad Faheemur Rahman, Wayne P. Burleson
2025	J	`jnl`	Watermarking and Anomaly Detection in Machine Learning Models for LORA RF Fingerprinting. CoRR Aarushi Mahajan, Wayne P. Burleson
2024	A	`conf`	RareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats. ICCAD Chang Meng, Mingfei Yu, Hanyu Wang, Wayne P. Burleson, Giovanni De Micheli
2023	J	`jnl`	Survey of Security Issues in Memristor-based Machine Learning Accelerators for RF Analysis. CoRR William Lillis, Max Cohen Hoffing, Wayne P. Burleson
2023	J	`jnl`	Voltage Sensor Implementations for Remote Power Attacks on FPGAs. ACM Trans. Reconfigurable Technol. Syst. Shayan Moini, Aleksa Deric, Xiang Li, George Provelengios, Wayne P. Burleson, Russell Tessier, Daniel E. Holcomb
2022	J	`jnl`	Programmable access-controlled and generic erasable PUF design and its applications. J. Cryptogr. Eng. Chenglu Jin, Wayne P. Burleson, Marten van Dijk, Ulrich Rührmair
2022	J	`jnl`	Redshift: Manipulating Signal Propagation Delay via Continuous-Wave Lasers. IACR Trans. Cryptogr. Hardw. Embed. Syst. Kohei Yamashita, Benjamin Cyr, Kevin Fu, Wayne P. Burleson, Takeshi Sugawara
2021	J	`jnl`	Cost-Effective and Flexible Asynchronous Interconnect Technology for GALS Systems. IEEE Micro Davide Bertozzi, Gabriele Miorandi, Alberto Ghiribaldi, Wayne P. Burleson, Greg Sadowski, Kshitij Bhardwaj, Weiwei Jiang, Steven M. Nowick
2021	—	`conf`	Reconfiguring the Mux-Based Arbiter PUF using FeFETs. ISQED Srinivasa Ramanujam, Wayne P. Burleson
2020	J	`jnl`	Cybersecurity of Hospitals: discussing the challenges and working towards mitigating the risks. BMC Medical Informatics Decis. Mak. Salem T. Argaw, Juan Ramón Troncoso-Pastoriza, Darren Lacey, Marie-Valentine Florin, Franck Calcavecchia, Denise Anderson, Wayne P. Burleson, Jan-Michael Vogel, Chana O'Leary, Bruce Eshaya-Chauvin, Antoine Flahault
2020	—	`conf`	Erasable PUFs: Formal Treatment and Generic Design. ASHES@CCS Chenglu Jin, Wayne P. Burleson, Marten van Dijk, Ulrich Rührmair
2020	J	`jnl`	Grand Challenges for Embedded Security Research in a Connected World. CoRR Wayne P. Burleson, Kevin Fu, Denise L. Anthony, Jorge Guajardo, Carl A. Gunter, Kyle Ingols, Jean-Baptiste Jeannin, Farinaz Koushanfar, Carl E. Landwehr, Susan Squires
2020	—	`conf`	Understanding and Comparing the Capabilities of On-Chip Voltage Sensors against Remote Power Attacks on FPGAs. MWSCAS Shayan Moini, Xiang Li, Peter Stanwicks, George Provelengios, Wayne P. Burleson, Russell Tessier, Daniel E. Holcomb
2019	—	`conf`	Combining Clock and Voltage Noise Countermeasures Against Power Side-Channel Analysis. ASAP Jacqueline Lagasse, Christopher Bartoli, Wayne P. Burleson
2019	J	`jnl`	Guest Editorial Special Section on Security Challenges and Solutions With Emerging Computing Technologies. IEEE Trans. Very Large Scale Integr. Syst. Anupam Chattopadhyay, Swaroop Ghosh, Wayne P. Burleson, Debdeep Mukhopadhyay
2019	—	`conf`	PVTMC: An All-Digital Sub-Picosecond Timing Measurement Circuit Based on Process Variations. ISVLSI Shuo Li, Xiaolin Xu, Wayne P. Burleson
2018	J	`jnl`	Efficient Erasable PUFs from Programmable Logic and Memristors. IACR Cryptol. ePrint Arch. Yansong Gao, Chenglu Jin, Jeeson Kim, Hussein Nili, Xiaolin Xu, Wayne P. Burleson, Omid Kavehei, Marten van Dijk, Damith Chinthana Ranasinghe, Ulrich Rührmair
2018	J	`jnl`	Enhancing Power, Performance, and Energy Efficiency in Chip Multiprocessors Exploiting Inverse Thermal Dependence. IEEE Trans. Very Large Scale Integr. Syst. Katayoun Neshatpour, Wayne P. Burleson, Amin Khajeh, Houman Homayoun
2018	J	`jnl`	Implications of Integrated CPU-GPU Processors on Thermal and Power Management Techniques. CoRR Kapil Dev, Indrani Paul, Wei Huang, Yasuko Eckert, Wayne P. Burleson, Sherief Reda
2017	A	`conf`	An asynchronous NoC router in a 14nm FinFET library: Comparison to an industrial synchronous counterpart. DATE Weiwei Jiang, Davide Bertozzi, Gabriele Miorandi, Steven M. Nowick, Wayne P. Burleson, Greg Sadowski
2017	—	`conf`	CCATDC: A Configurable Compact Algorithmic Time-to-Digital Converter. ISVLSI Shuo Li, Xiaolin Xu, Wayne P. Burleson
2016	A*	`conf`	Invited - Who is the major threat to tomorrow's security?: you, the hardware designer. DAC Wayne P. Burleson, Onur Mutlu, Mohit Tiwari
2016	J	`jnl`	Persistent Clocks for Batteryless Sensing Devices. ACM Trans. Embed. Comput. Syst. Josiah D. Hester, Nicole Tobias, Amir Rahmati, Lanny Sitanayah, Daniel E. Holcomb, Kevin Fu, Wayne P. Burleson, Jacob Sorber
2016	—	`conf`	Using Statistical Models to Improve the Reliability of Delay-Based PUFs. ISVLSI Xiaolin Xu, Wayne P. Burleson, Daniel E. Holcomb
2016	—	`conf`	Workload-Aware Power Gating Design and Run-Time Management for Massively Parallel GPGPUs. ISVLSI Kapil Dev, Sherief Reda, Indrani Paul, Wei Huang, Wayne P. Burleson
2015	—	`conf`	Development of a Layout-Level Hardware Obfuscation Tool. ISVLSI Shweta Malik, Georg T. Becker, Christof Paar, Wayne P. Burleson
2015	J	`jnl`	Entropy and Energy Bounds for Metastability Based TRNG with Lightweight Post-Processing. IEEE Trans. Circuits Syst. I Regul. Pap. Vikram B. Suresh, Wayne P. Burleson
2015	J	`jnl`	PLayPUF: Programmable Logically Erasable PUFs for Forward and Backward Secure Key Management. IACR Cryptol. ePrint Arch. Chenglu Jin, Xiaolin Xu, Wayne P. Burleson, Ulrich Rührmair, Marten van Dijk
2015	—	`conf`	Reinforcement Learning for Thermal-aware Many-core Task Allocation. ACM Great Lakes Symposium on VLSI Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2015	J	`jnl`	Reliable Physical Unclonable Functions Using Data Retention Voltage of SRAM Cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaolin Xu, Amir Rahmati, Daniel E. Holcomb, Kevin Fu, Wayne P. Burleson
2015	—	`conf`	Revisiting Dynamic Thermal Management Exploiting Inverse Thermal Dependence. ACM Great Lakes Symposium on VLSI Katayoun Neshatpour, Houman Homayoun, Amin Khajeh, Wayne P. Burleson
2015	—	`conf`	Security Evaluation and Enhancement of Bistable Ring PUFs. RFIDSec Xiaolin Xu, Ulrich Rührmair, Daniel E. Holcomb, Wayne P. Burleson
2015	J	`jnl`	Security Evaluation and Enhancement of Bistable Ring PUFs. IACR Cryptol. ePrint Arch. Xiaolin Xu, Ulrich Rührmair, Daniel E. Holcomb, Wayne P. Burleson
2015	—	`conf`	Side-Channel Assisted Modeling Attacks on Feed-Forward Arbiter PUFs Using Silicon Data. RFIDSec Raghavan Kumar, Wayne P. Burleson
2015	A*	`conf`	Virtual Proofs of Reality and their Physical Implementation. IEEE Symposium on Security and Privacy Ulrich Rührmair, J. L. Martinez-Hurtado, Xiaolin Xu, Christian Kraeh, Christian Hilgers, Dima Kononchuk, Jonathan J. Finley, Wayne P. Burleson
2014	—	`conf`	A Broadcast-Enabled Sensing System for Embedded Multi-core Processors. ISVLSI Jia Zhao, Shiting (Justin) Lu, Wayne P. Burleson, Russell Tessier
2014	—	`conf`	A lightweight cryptographic system for implantable biosensors. BioCAS Sara S. Ghoreishizadeh, Tolga Yalçin, Antonio Pullini, Giovanni De Micheli, Wayne P. Burleson, Sandro Carrara
2014	J	`jnl`	Dynamic On-Chip Thermal Sensor Calibration Using Performance Counters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2014	—	`conf`	Dynamic synchronizer flip-flop performance in FinFET technologies. NOCS Mark Buckler, Arpan Vaidya, Xiaobin Liu, Wayne P. Burleson
2014	A	`conf`	Efficient Power and Timing Side Channels for Physical Unclonable Functions. CHES Ulrich Rührmair, Xiaolin Xu, Jan Sölter, Ahmed Mahmoud, Mehrdad Majzoobi, Farinaz Koushanfar, Wayne P. Burleson
2014	—	`conf`	Fine grained wearout sensing using metastability resolution time. ISQED Vikram B. Suresh, Wayne P. Burleson
2014	C	`conf`	Hybrid modeling attacks on current-based PUFs. ICCD Raghavan Kumar, Wayne P. Burleson
2014	A	`conf`	Hybrid side-channel/machine-learning attacks on PUFs: A new threat? DATE Xiaolin Xu, Wayne P. Burleson
2014	C	`conf`	Keynote talk I: Security and privacy in implantable medical devices: An ongoing concern. MEMOCODE Wayne P. Burleson
2014	A*	`conf`	Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques. DAC Xinfei Guo, Wayne P. Burleson, Mircea R. Stan
2014	C	`conf`	Modeling and analysis of Phase Change Materials for efficient thermal management. ICCD Fulya Kaplan, Charlie De Vivero, Samuel Howes, Manish Arora, Houman Homayoun, Wayne P. Burleson, Dean M. Tullsen, Ayse K. Coskun
2014	—	`conf`	On design of a highly secure PUF based on non-linear current mirrors. HOST Raghavan Kumar, Wayne P. Burleson
2014	C	`conf`	Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware. FDTC Raghavan Kumar, Philipp Jovanovic, Wayne P. Burleson, Ilia Polian
2014	J	`jnl`	Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware. IACR Cryptol. ePrint Arch. Raghavan Kumar, Philipp Jovanovic, Wayne P. Burleson, Ilia Polian
2014	—	`conf`	Post-Silicon Validation and Calibration of Hardware Security Primitives. ISVLSI Xiaolin Xu, Vikram B. Suresh, Raghavan Kumar, Wayne P. Burleson
2014	—	`conf`	Predictive synchronization for DVFS-enabled multi-processor systems. ISQED Mark Buckler, Wayne P. Burleson
2014	—	`conf`	REFLEX: Reconfigurable logic for entropy extraction. SoCC Vikram B. Suresh, Wayne P. Burleson
2014	A	`conf`	Special session: How secure are PUFs really? On the reach and limits of recent PUF attacks. DATE Ulrich Rührmair, Ulf Schlichtmann, Wayne P. Burleson
2014	J	`jnl`	Stealthy dopant-level hardware Trojans: extended version. J. Cryptogr. Eng. Georg T. Becker, Francesco Regazzoni, Christof Paar, Wayne P. Burleson
2014	—	`conf`	Variation Aware Design of Post-Silicon Tunable Clock Buffer. ISVLSI Vikram B. Suresh, Wayne P. Burleson
2013	A*	`conf`	Balancing security and utility in medical devices? DAC Masoud Rostami, Wayne P. Burleson, Farinaz Koushanfar, Ari Juels
2013	A	`conf`	Efficient E-Cash in Practice: NFC-Based Payments for Public Transportation Systems. Privacy Enhancing Technologies Gesine Hinterwälder, Christian T. Zenger, Foteini Baldimtsi, Anna Lysyanskaya, Christof Paar, Wayne P. Burleson
2013	Misc	`conf`	Impact of Clock-Gating on Power Distribution Network Using Wavelet Analysis. VLSI Design Vinay C. Patil, Sudarshan Srinivasan, Wayne P. Burleson, Sandip Kundu
2013	A	`conf`	Litho-aware and low power design of a secure current-based physically unclonable function. ISLPED Raghavan Kumar, Wayne P. Burleson
2013	A	`conf`	Low-power Networks-on-Chip: Progress and remaining challenges. ISLPED Mark Buckler, Wayne P. Burleson, Greg Sadowski
2013	—	`conf`	On-chip lightweight implementation of reduced NIST randomness test suite. HOST Vikram B. Suresh, Daniele Antonioli, Wayne P. Burleson
2013	J	`jnl`	PUF Modeling Attacks on Simulated and Silicon Data. IACR Cryptol. ePrint Arch. Ulrich Rührmair, Jan Sölter, Frank Sehnke, Xiaolin Xu, Ahmed Mahmoud, Vera Stoyanova, Gideon Dror, Jürgen Schmidhuber, Wayne P. Burleson, Srinivas Devadas
2013	J	`jnl`	PUF Modeling Attacks on Simulated and Silicon Data. IEEE Trans. Inf. Forensics Secur. Ulrich Rührmair, Jan Sölter, Frank Sehnke, Xiaolin Xu, Ahmed Mahmoud, Vera Stoyanova, Gideon Dror, Jürgen Schmidhuber, Wayne P. Burleson, Srinivas Devadas
2013	J	`jnl`	Power and Timing Side Channels for PUFs and their Efficient Exploitation. IACR Cryptol. ePrint Arch. Ulrich Rührmair, Xiaolin Xu, Jan Sölter, Ahmed Mahmoud, Farinaz Koushanfar, Wayne P. Burleson
2013	A	`conf`	Run-time probabilistic detection of miscalibrated thermal sensors in many-core systems. DATE Jia Zhao, Shiting (Justin) Lu, Wayne P. Burleson, Russell Tessier
2013	A	`conf`	Stealthy Dopant-Level Hardware Trojans. CHES Georg T. Becker, Francesco Regazzoni, Christof Paar, Wayne P. Burleson
2013	J	`jnl`	Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise. IEEE Trans. Very Large Scale Integr. Syst. Hu Xu, Vasilis F. Pavlidis, Xifan Tang, Wayne P. Burleson, Giovanni De Micheli
2012	J	`jnl`	An architecture-independent instruction shuffler to protect against side-channel attacks. ACM Trans. Archit. Code Optim. Ali Galip Bayrak, Nikola Velickovic, Paolo Ienne, Wayne P. Burleson
2012	A	`conf`	Collaborative calibration of on-chip thermal sensors using performance counters. ICCAD Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2012	J	`jnl`	Compact Expressions for Supply Noise Induced Period Jitter of Global Binary Clock Trees. IEEE Trans. Very Large Scale Integr. Syst. Jinwook Jang, Olivier Franza, Wayne P. Burleson
2012	—	`conf`	DRV-Fingerprinting: Using Data Retention Voltage of SRAM Cells for Chip Identification. RFIDSec Daniel E. Holcomb, Amir Rahmati, Mastooreh Salajegheh, Wayne P. Burleson, Kevin Fu
2012	J	`jnl`	Design and Validation of Arbiter-Based PUFs for Sub-45-nm Low-Power Security Applications. IEEE Trans. Inf. Forensics Secur. Lang Lin, Sudheendra Srivathsa, Dilip Kumar Krishnappa, Prasad Shabadi, Wayne P. Burleson
2012	A*	`conf`	Design challenges for secure implantable medical devices. DAC Wayne P. Burleson, Shane S. Clark, Benjamin Ransford, Kevin Fu
2012	J	`jnl`	Detecting Software Theft in Embedded Systems: A Side-Channel Approach. IEEE Trans. Inf. Forensics Secur. Georg T. Becker, Daehyun Strobel, Christof Paar, Wayne P. Burleson
2012	—	`conf`	Distributed sensor data processing for many-cores. ACM Great Lakes Symposium on VLSI Jia Zhao, Russell Tessier, Wayne P. Burleson
2012	J	`jnl`	Fully Integrated Biochip Platforms for Advanced Healthcare. Sensors Sandro Carrara, Sara S. Ghoreishizadeh, Jacopo Olivo, Irene Taurino, Camilla Baj-Rossi, Andrea Cavallini, Maaike Op de Beeck, Catherine Dehollain, Wayne P. Burleson, Francis Moussy, Anthony Guiseppi-Elie, Giovanni De Micheli
2012	—	`conf`	PHAP: Password based Hardware Authentication using PUFs. MICRO Workshops Raghavan Kumar, Wayne P. Burleson
2012	—	`conf`	Privacy Preserving Payments on Computational RFID Devices with Application in Intelligent Transportation Systems. RFIDSec Gesine Hinterwälder, Christof Paar, Wayne P. Burleson
2012	—	`conf`	Robust metastability-based TRNG design in nanometer CMOS with sub-vdd pre-charge and hybrid self-calibration. ISQED Vikram B. Suresh, Wayne P. Burleson
2012	J	`jnl`	Side channels as building blocks. J. Cryptogr. Eng. Markus Kasper, Amir Moradi, Georg T. Becker, Oliver Mischke, Tim Güneysu, Christof Paar, Wayne P. Burleson
2012	A*	`conf`	TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks. USENIX Security Symposium Amir Rahmati, Mastooreh Salajegheh, Daniel E. Holcomb, Jacob Sorber, Wayne P. Burleson, Kevin Fu
2012	—	`conf`	The combined effect of process variations and power supply noise on clock skew and jitter. ISQED Hu Xu, Vasilis F. Pavlidis, Wayne P. Burleson, Giovanni De Micheli
2011	—	`conf`	A 12.4μm ISQED Basab Datta, Wayne P. Burleson
2011	—	`conf`	A 45.6μ ACM Great Lakes Symposium on VLSI Basab Datta, Wayne P. Burleson
2011	J	`jnl`	A Dedicated Monitoring Infrastructure for Multicore Processors. IEEE Trans. Very Large Scale Integr. Syst. Jia Zhao, Sailaja Madduri, Ramakrishna Vadlamani, Wayne P. Burleson, Russell Tessier
2011	—	`conf`	A high sensitivity and process tolerant digital thermal sensing scheme for 3-D Ics. ACM Great Lakes Symposium on VLSI Basab Datta, Wayne P. Burleson
2011	—	`conf`	An arbiter based on-chip droop detector system. ACM Great Lakes Symposium on VLSI Jinwook Jang, Wayne P. Burleson
2011	—	`conf`	Hardware security in VLSI. ACM Great Lakes Symposium on VLSI Wayne P. Burleson, Yusuf Leblebici
2011	C	`conf`	Implementing hardware Trojans: Experiences from a hardware Trojan challenge. ICCD Georg T. Becker, Ashwin Lakshminarasimhan, Lang Lin, Sudheendra Srivathsa, Vikram B. Suresh, Wayne P. Burleson
2011	—	`conf`	Robust signaling techniques for through silicon via bundles. ACM Great Lakes Symposium on VLSI Krishna C. Chillara, Jinwook Jang, Wayne P. Burleson
2011	J	`jnl`	Temperature Effects on Practical Energy Optimization of Sub-Threshold Circuits in Deep Nanometer Technologies. J. Low Power Electron. Basab Datta, Wayne P. Burleson
2010	—	`conf`	Analysis and mitigation of NBTI-impact on PVT variability in repeated global interconnect performance. ACM Great Lakes Symposium on VLSI Basab Datta, Wayne P. Burleson
2010	—	`conf`	Calibration of on-chip thermal sensors using process monitoring circuits. ISQED Basab Datta, Wayne P. Burleson
2010	—	`conf`	Circuit-level NBTI macro-models for collaborative reliability monitoring. ACM Great Lakes Symposium on VLSI Basab Datta, Wayne P. Burleson
2010	—	`conf`	Entropy Extraction in Metastability-based TRNG. HOST Vikram B. Suresh, Wayne P. Burleson
2010	A	`conf`	Low-power sub-threshold design of secure physical unclonable functions. ISLPED Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnappa, Prasad Shabadi, Wayne P. Burleson
2010	A	`conf`	Multicore soft error rate stabilization using adaptive dual modular redundancy. DATE Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson, Russell Tessier
2010	—	`conf`	Thermal-aware voltage droop compensation for multi-core architectures. ACM Great Lakes Symposium on VLSI Jia Zhao, Basab Datta, Wayne P. Burleson, Russell Tessier
2009	A	`conf`	A monitor interconnect and support subsystem for multicore processors. DATE Sailaja Madduri, Ramakrishna Vadlamani, Wayne P. Burleson, Russell Tessier
2009	J	`jnl`	A security approach for off-chip memory in embedded microprocessor systems. Microprocess. Microsystems Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Eduardo Braulio Wanderley Netto, Russell Tessier, Wayne P. Burleson
2009	A*	`conf`	Analysis and mitigation of process variation impacts on Power-Attack Tolerance. DAC Lang Lin, Wayne P. Burleson
2009	—	`conf`	Low-power, process-variation tolerant on-chip thermal monitoring using track and hold based thermal sensors. ACM Great Lakes Symposium on VLSI Basab Datta, Wayne P. Burleson
2009	A	`conf`	MOLES: Malicious off-chip leakage enabled by side-channels. ICCAD Lang Lin, Wayne P. Burleson, Christof Paar
2009	—	`conf`	On temperature planarization effect of copper dummy fills in deep nanometer technology. ISQED Basab Datta, Wayne P. Burleson
2009	J	`jnl`	Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers. IEEE Trans. Computers Daniel E. Holcomb, Wayne P. Burleson, Kevin Fu
2009	—	`conf`	Temperature effects on energy optimization in sub-threshold circuit design. ISQED Basab Datta, Wayne P. Burleson
2009	A	`conf`	Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering. CHES Lang Lin, Markus Kasper, Tim Güneysu, Christof Paar, Wayne P. Burleson
2008	—	`conf`	Collaborative sensing of on-chip wire temperatures using interconnect based ring oscillators. ACM Great Lakes Symposium on VLSI Basab Datta, Wayne P. Burleson
2008	C	`conf`	Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems. ISCAS Lang Lin, Wayne P. Burleson
2008	—	`conf`	Low-power clock distribution in a multilayer core 3d microprocessor. ACM Great Lakes Symposium on VLSI Venkatesh Arunachalam, Wayne P. Burleson
2008	J	`jnl`	Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective. IEEE Trans. Very Large Scale Integr. Syst. Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-Philippe Diguet, Lilian Bossuet, Romain Vaslin
2008	—	`conf`	Temperature measurement in Content Addressable Memory cells using bias-controlled VCO. SoCC Basab Datta, Wayne P. Burleson
2007	—	`conf`	An Energy-efficient Multi-bit Quaternary Current-mode Signaling for On-chip Interconnects. CICC Vishak Venkatraman, Wayne P. Burleson
2007	J	`jnl`	Current-Sensing and Repeater Hybrid Circuit Technique for On-Chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. Atul Maheshwari, Wayne P. Burleson
2007	—	`conf`	Distributed Collaborative Adaptive Sensing: A Unifying Theme for a Junior Level Embedded Systems Course. MSE Dhruv Kumar, Wayne P. Burleson
2007	—	`conf`	High-efficiency protection solution for off-chip memory in embedded systems. ERSA Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Wayne P. Burleson
2007	—	`conf`	Low latency Solution for Confidentiality and Integrity Checking in Embedded Systems with Off-Chip Memory. ReCoSoC Romain Vaslin, Guy Gogniat, Eduardo Braulio Wanderley Netto, Russell Tessier, Wayne P. Burleson
2007	C	`conf`	Low power on-chip thermal sensors based on wires. VLSI-SoC Basab Datta, Wayne P. Burleson
2007	—	`conf`	Thermal Impacts on NoC Interconnects. NOCS Sheng Xu, Ibis Benito, Wayne P. Burleson
2006	—	`conf`	A Low-swing Signaling Circuit Technique for 65nm On-chip Interconnects. SoCC Vishak Venkatraman, Mark A. Anders, Himanshu Kaul, Wayne P. Burleson, Ram Krishnamurthy
2006	J	`jnl`	Dynamically configurable security for SRAM FPGA bitstreams. Int. J. Embed. Syst. Lilian Bossuet, Guy Gogniat, Wayne P. Burleson
2006	—	`conf`	Reconfigurable Security Support for Embedded Systems. HICSS Guy Gogniat, Tilman Wolf, Wayne P. Burleson
2005	—	`conf`	A 2GHz 13.6mW 12 × 9b multiplier for energy efficient FFT accelerators. ESSCIRC Steven Hsu, Vishak Venkatraman, Sanu Mathew, Himanshu Kaul, Mark A. Anders, Saurabh Dighe, Wayne P. Burleson, Ram Krishnamurthy
2005	J	`jnl`	A reconfigurable, power-efficient adaptive Viterbi decoder. IEEE Trans. Very Large Scale Integr. Syst. Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne P. Burleson
2005	J	`jnl`	An energy-aware active smart card. IEEE Trans. Very Large Scale Integr. Syst. Russell Tessier, David Jasinski, Atul Maheshwari, Aiyappan Natarajan, Weifeng Xu, Wayne P. Burleson
2005	—	`conf`	Configurable Computing for High-Security/High-Performance Ambient Systems. SAMOS Guy Gogniat, Wayne P. Burleson, Lilian Bossuet
2005	—	`conf`	Digital Systems Design with ASIC and FPGA: A Novel Course Using CD/DVD and On-Line Formats. MSE Wayne P. Burleson, Sheng Xu
2005	Misc	`conf`	Impact of Process Variations on Multi-Level Signaling for On-Chip Interconnects. VLSI Design Vishak Venkatraman, Wayne P. Burleson
2005	—	`conf`	Jitter in Deep Sub-Micron Interconnect. ISVLSI Jinwook Jang, Sheng Xu, Wayne P. Burleson
2005	J	`jnl`	Power-Aware 3D Computer Graphics Rendering. J. VLSI Signal Process. Jeongseon Euh, Jeevan Chittamuru, Wayne P. Burleson
2005	—	`conf`	Reconfigurable Security Primitive for Embedded Systems. SoC Guy Gogniat, Tilman Wolf, Wayne P. Burleson
2005	—	`conf`	Robust Multi-Level Current-Mode On-Chip Interconnect Signaling in the Presence of Process Variations. ISQED Vishak Venkatraman, Wayne P. Burleson
2005	—	`conf`	Sensing Design Issues in Deep Submicron CMOS SRAMs. ISVLSI Aiyappan Natarajan, Vijay Shankar, Atul Maheshwari, Wayne P. Burleson
2005	J	`jnl`	Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test. IEEE Trans. Computers Matthew W. Heath, Wayne P. Burleson, Ian G. Harris
2004	J	`jnl`	Differential current-sensing for on-chip interconnects. IEEE Trans. Very Large Scale Integr. Syst. Atul Maheshwari, Wayne P. Burleson
2004	A	`conf`	Dynamically Configurable Security for SRAM FPGA Bitstreams. IPDPS Lilian Bossuet, Guy Gogniat, Wayne P. Burleson
2004	J	`jnl`	Dynamically Parameterized Algorithms and Architectures to Exploit Signal Variations. J. VLSI Signal Process. Prashant Jain, Andrew Laffely, Wayne P. Burleson, Russell Tessier, Dennis Goeckel
2004	—	`conf`	Mitigating static power in current-sensed interconnects. ACM Great Lakes Symposium on VLSI Vishak Venkatraman, Atul Maheshwari, Wayne P. Burleson
2004	—	`conf`	NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. SLIP Vishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne P. Burleson
2004	A	`conf`	Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s. DATE Matthew W. Heath, Wayne P. Burleson, Ian G. Harris
2004	J	`jnl`	Trading off transient fault tolerance and power consumption in deep submicron (DSM) VLSI circuits. IEEE Trans. Very Large Scale Integr. Syst. Atul Maheshwari, Wayne P. Burleson, Russell Tessier
2003	—	`conf`	A hybrid adiabatic content addressable memory for ultra low-power applications. ACM Great Lakes Symposium on VLSI Aiyappan Natarajan, David Jasinski, Wayne P. Burleson, Russell Tessier
2003	—	`conf`	Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores. ICIP (3) Andrew Laffely, Jian Liang, Russell Tessier, Wayne P. Burleson
2003	—	`conf`	Interconnect Effort - A Unification of Repeater Insertion and Logical Effort. ISVLSI Srividya Srinivasaraghavan, Wayne P. Burleson
2003	—	`conf`	Low voltage sensing techniques and secondary design issues for sub-90nm caches. ESSCIRC Manoj Sinha, Steven Hsu, Atila Alvandpour, Wayne P. Burleson, Ram Krishnamurthy, Shekhar Borkar
2003	—	`conf`	Repeater and current-sensing hybrid circuits for on-chip interconnects. ACM Great Lakes Symposium on VLSI Atul Maheshwari, Wayne P. Burleson
2003	A	`conf`	Targeting Tiled Architectures in Design Exploration. IPDPS Lilian Bossuet, Wayne P. Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe
2003	—	`conf`	Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits. DFT Atul Maheshwari, Israel Koren, Wayne P. Burleson
2003	—	`conf`	Using System On-A-Chip As A Vehicle For VLSI Design Education. MSE Andrew Laffely, Wayne P. Burleson
2002	—	`conf`	A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics. PACS Jeongseon Euh, Jeevan Chittamuru, Wayne P. Burleson
2002	A	`conf`	A dynamically reconfigurable adaptive viterbi decoder. FPGA Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne P. Burleson
2002	J	`jnl`	Boosters for driving long onchip interconnects - design issues, interconnect synthesis, and comparison with repeaters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ankireddy Nalamalpu, Sriram Srinivasan, Wayne P. Burleson
2002	—	`conf`	Trading off Reliability and Power-Consumption in Ultra-low Power Systems. ISQED Atul Maheshwari, Wayne P. Burleson, Russell Tessier
2001	—	`conf`	Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeaters. ISPD Ankireddy Nalamalpu, Wayne P. Burleson
2001	—	`conf`	Dynamically Parameterized Architectures for Power-Aware Video Coding: Motion Estimation and DCT. Workshop on Digital and Computational Video Wayne P. Burleson, Prashant Jain, Subramanian Venkatraman
2001	Misc	`conf`	Dynamically parameterized algorithms and architectures to exploit signal variations for improved performance and reduced power. ICASSP Wayne P. Burleson, Russell Tessier, Dennis Goeckel, Sriram Swaminathan, Prashant Jain, Jeongseon Euh, Subramanian Venkatraman, Vidhya Thyagarajan
2001	J	`jnl`	Guest Editorial: Reconfigurable Signal Processing Systems. J. VLSI Signal Process. Wayne P. Burleson, Naresh R. Shanbhag
2001	J	`jnl`	Reconfigurable Computing for Digital Signal Processing: A Survey. J. VLSI Signal Process. Russell Tessier, Wayne P. Burleson
2000	—	`conf`	Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering. PACS Jeongseon Euh, Wayne P. Burleson
2000	J	`jnl`	Guest Editor's Introduction. J. VLSI Signal Process. Elias S. Manolakos, Wayne P. Burleson
2000	A	`conf`	Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. FPGA Andrés D. García, Jean-Luc Danger, Wayne P. Burleson
2000	C	`conf`	Low power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. ISCAS Andrés D. García, Wayne P. Burleson, Jean-Luc Danger
2000	C	`conf`	Repeater insertion in deep sub-micron CMOS: ramp-based analytical model and placement sensitivity analysis. ISCAS Ankireddy Nalamalpu, Wayne P. Burleson
2000	A	`conf`	The Multimedia Online Collaboration Architecture: Tools to Enable Distance Learning. IEEE International Conference on Multimedia and Expo (II) Jeff Peden, Wayne P. Burleson, Chris Leonardo
1999	A	`conf`	Configuration Cloning: Exploiting Regularity in Dynamic DSP Architectures. FPGA S. R. Park, Wayne P. Burleson
1999	B	`conf`	Power Modelling in Field Programmable Gate Arrays (FPGA). FPL Andrés D. García, Wayne P. Burleson, Jean-Luc Danger
1999	J	`jnl`	The spring scheduling coprocessor: a scheduling accelerator. IEEE Trans. Very Large Scale Integr. Syst. Wayne P. Burleson, Jason Ko, Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems
1998	J	`jnl`	Efficient VLSI for Lempel-Ziv compression in wireless data communication networks. IEEE Trans. Very Large Scale Integr. Syst. Bongjin Jung, Wayne P. Burleson
1998	J	`jnl`	Guest Editors' Introduction. J. VLSI Signal Process. Wayne P. Burleson, Konstantinos Konstantinides
1998	J	`jnl`	Performance optimization of wireless local area networks through VLSI data compression. Wirel. Networks Bongjin Jung, Wayne P. Burleson
1998	Misc	`conf`	Reconfiguration for power saving in real-time motion estimation. ICASSP S. R. Park, Wayne P. Burleson
1998	J	`jnl`	Vlsi Array Architectures for Pyramid Vector Quantization. J. VLSI Signal Process. Bongjin Jung, Wayne P. Burleson
1998	J	`jnl`	Wave-pipelining: a tutorial and research survey. IEEE Trans. Very Large Scale Integr. Syst. Wayne P. Burleson, Maciej J. Ciesielski, Fabian Klass, W. Liu
1997	Misc	`conf`	An FPGA-based data acquisition system for a 95 GHz W-band radar. ICASSP Michael Petronino, Ray Bambha, James R. Carswell, Wayne P. Burleson
1997	J	`jnl`	Low-power encodings for global communication in CMOS VLSI. IEEE Trans. Very Large Scale Integr. Syst. Mircea R. Stan, Wayne P. Burleson
1997	J	`jnl`	VLSI array algorithms and architectures for RSA modular multiplication. IEEE Trans. Very Large Scale Integr. Syst. Yongjin Jeong, Wayne P. Burleson
1996	A	`conf`	Two dimensional codes for low power. ISLPED Mircea R. Stan, Wayne P. Burleson
1995	J	`jnl`	Bus-invert coding for low-power I/O. IEEE Trans. Very Large Scale Integr. Syst. Mircea R. Stan, Wayne P. Burleson
1995	—	`conf`	Coding a terminated bus for low power. Great Lakes Symposium on VLSI Mircea R. Stan, Wayne P. Burleson
1995	A*	`conf`	Equivalence Checking of Datapaths Based on Canonical Arithmetic Expressions. DAC Zheng Zhou, Wayne P. Burleson
1995	C	`conf`	High-Level Estimation of High-Performance Architectures for Reed-Solomon Decoding. ISCAS Yongjin Jeong, Wayne P. Burleson
1994	C	`conf`	A VLSI Systolic Array Architecture for Lempel-Ziv-Based Data Compression. ISCAS Bongjin Jung, Wayne P. Burleson
1994	J	`jnl`	Analog VLSI for robot path planning. J. VLSI Signal Process. Mircea R. Stan, Wayne P. Burleson, Christopher I. Connolly, Roderic A. Grupen
1994	—	`conf`	Distributed control synthesis for data-dependent iterative algorithms. ASAP Bongjin Jung, Yongjin Jeong, Wayne P. Burleson
1994	C	`conf`	Forum: Wave-pipelining: Is it Practical? ISCAS Wayne P. Burleson, Leonard W. Cotten, Fabian Klass, Maciej J. Ciesielski
1994	—	`conf`	Using Regular Array Methods for DSP Module Synthesis. HICSS (1) Wayne P. Burleson
1993	—	`conf`	Formal descriptions, semantics and verification of VLSI array processors. ASAP Zheng Zhou, Wayne P. Burleson
1993	—	`conf`	Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design. ASAP Bongjin Jung, Wayne P. Burleson
1993	C	`conf`	Rank-order Filtering Algorithms: A Comparison of VLSI Implementations. ISCAS J. David Narkiewicz, Wayne P. Burleson
1993	C	`conf`	The Spring Scheduling Co-Processor: A Scheduling Accelerator. ICCD Wayne P. Burleson, Jason Ko, Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems
1993	A	`conf`	The Spring Scheduling Co-Processor: Design, Use, and Performance. RTSS Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems, Wayne P. Burleson, Jason Ko
1993	—	`conf`	VLSI array synthesis for polynomial GCD computation. ASAP Yongjin Jeong, Wayne P. Burleson
1992	—	`conf`	ARREST: an interactive graphic analysis tool for VLSI arrays. ASAP Wayne P. Burleson, Bongjin Jung
1991	C	`conf`	A Simulator for General Purpose Optical Arrays. ICCD Walter B. Marvin, Wayne P. Burleson
1991	J	`jnl`	A VLSI design methodology for distributed arithmetic. J. VLSI Signal Process. Wayne P. Burleson, Louis L. Scharf
1991	—	`conf`	Input/Output Design for VLSI Array Architectures. VLSI Wayne P. Burleson, Louis L. Scharf
1991	Misc	`conf`	The partitioning problem on VLSI arrays: I/O and local memory complexity. ICASSP Wayne P. Burleson
1989	J	`jnl`	A systolic VSLI chip for implementing orthogonal transforms. IEEE J. Solid State Circuits Wayne P. Burleson, Louis L. Scharf, Arthur R. Gabriel, Neil H. Endsley