Wang Ling Goh - RankMe

133 papers A* 4C 33Misc 1Journal 44Unranked 51

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	FPGA Implementation of PoolFormer Network Using Python-Driven High-Level Synthesis Framework for Edge-AIoT Speech Recognition. IEEE Trans. Very Large Scale Integr. Syst. Tiancheng Cao, Zhongyi Zhang, Wei Soon Ng, Wang Ling Goh, Yuan Gao
2026	J	`jnl`	FPGA-Based Real-Time ECG Classification System Using Quantized Inception-ResNeXt Neural Network and CWT Approximation. IEEE Trans. Very Large Scale Integr. Syst. Tiancheng Cao, Wei Soon Ng, Wang Ling Goh, Yuan Gao, Hen-Wei Huang
2026	J	`jnl`	Low-Power Learnable Digital Audio Feature Extractor for Always-on Keyword Spotting in Edge Devices. IEEE Trans. Circuits Syst. I Regul. Pap. Chen Shen, Jinhai Hu, Wang Ling Goh, Yi Sheng Chong, Anh Tuan Do, Yuan Gao
2025	C	`conf`	A 0.58mW dB-Linear Time Gain Compensation Amplifier with ±0.5-dB Gain Error for Imaging Applications. ISCAS Zhaoyang Cao, Jinhai Hu, Wang Ling Goh, Yuan Gao
2025	J	`jnl`	A 310 nA DCM Hysteretic Buck Converter With 95.8% Peak Efficiency and Greater Than 90% Efficiency in 10 μA-100 mA Load Range for Battery Powered IoT Sensors. IEEE Trans. Circuits Syst. I Regul. Pap. Ziming Liu, Wang Ling Goh, Liter Siek, Yuan Gao
2025	C	`conf`	A Digital Compute-in-Memory Macro Featuring Two's Complement Multiplication for LSTM-based Biomedical Signal Classification. ISCAS Jinhai Hu, Wang Ling Goh, Yuan Gao
2025	C	`conf`	A Gait Data Compression and Reconstruction Framework for Edge Device using Low-Dimensional Attention Model with Autoencoder. ISCAS Shuailin Tao, Wang Ling Goh, Tiancheng Cao, Yuan Gao
2025	J	`jnl`	AI-Powered Agile Analog Circuit Design and Optimization. CoRR Jinhai Hu, Wang Ling Goh, Yuan Gao
2025	C	`conf`	Design and Analysis of Latch-Type Comparators for Cryogenic Operations. ISCAS Qibang Zang, Wang Ling Goh, Andres Brito, Anh Tuan Do
2025	J	`jnl`	Edge PoolFormer: Modeling and Training of PoolFormer Network on RRAM Crossbar for Edge-AI Applications. IEEE Trans. Very Large Scale Integr. Syst. Tiancheng Cao, Weihao Yu, Yuan Gao, Chen Liu, Tantan Zhang, Shuicheng Yan, Wang Ling Goh
2025	J	`jnl`	LearnAFE: Circuit-Algorithm Co-Design Framework for Learnable Audio Analog Front-End. IEEE Trans. Circuits Syst. I Regul. Pap. Jinhai Hu, Zhongyi Zhang, Cong Sheng Leow, Wang Ling Goh, Yuan Gao
2025	J	`jnl`	LearnAFE: Circuit-Algorithm Co-design Framework for Learnable Audio Analog Front-End. CoRR Jinhai Hu, Zhongyi Zhang, Cong Sheng Leow, Wang Ling Goh, Yuan Gao
2025	C	`conf`	Neuromorphic FeRAM-Based Co-Design for Imaging Enhancement in Handheld Photoacoustic Systems. ISCAS Tiancheng Cao, Zhengyuan Zhang, Shuailin Tao, Chen Liu, Wang Ling Goh, Yuanjing Zheng, Yuan Gao
2025	C	`conf`	Qubit-State Discrimination using Neural Networks with Rapid and Energy-Efficient Compute Arrays. ISCAS Yuntian Liu, Yi Sheng Chong, Benjamin Lienhard, Minghao Fan, Wang Ling Goh, Vishnu P. Nambiar, Anh Tuan Do
2025	J	`jnl`	Real-Time Imaging Enhancement of Handheld Photoacoustic System With FeRAM Crossbar Array Based Neuromorphic Design. IEEE Trans. Biomed. Circuits Syst. Zhengyuan Zhang, Tiancheng Cao, Siyu Liu, Haoran Jin, Wensong Wang, Xiangjun Yin, Chen Liu, Wang Ling Goh, Yuan Gao, Yuanjin Zheng
2025	J	`jnl`	Supervised Contrastive Learning Framework and Hardware Implementation of Learned ResNet for Real-Time Respiratory Sound Classification. IEEE Trans. Biomed. Circuits Syst. Jinhai Hu, Cong Sheng Leow, Shuailin Tao, Wang Ling Goh, Yuan Gao
2024	C	`conf`	3881 Gbps/W, 3005 µm AES Core with State Based Clock Gating for IoT applications. ISCAS Zhangyi Pei, Vishnu P. Nambiar, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do
2024	C	`conf`	A 99.8-dB SNDR 10kHz-BW Second-Order DT Delta-Sigma Modulator with Single OTA and Enhanced Noise-Coupling. ISCAS Jiaju Lu, Siqi Zhang, Wang Ling Goh, Yuan Gao
2024	C	`conf`	A Nanowatt Area-Efficient 16-Channel Bandpass Filterbank with Floating Active Capacitance Multiplier for Acoustic Signal Processing. ISCAS Zhongyi Zhang, Wang Ling Goh, Yuan Gao
2024	—	`conf`	A PUF-Integrated Power Amplifier with Harmonic Tunable Matching Network-Controlled Spectral Regrowth Technique for RF Fingerprinting in IoT. A-SSCC Zexin Su, Chang Liu, Zhe Chen, Zhiqiang Li, Guangyin Shi, Qian Luo, Jixin Chen, Wang Ling Goh, Zhengsheng Han, Bo Li
2024	—	`conf`	Convolutional Auto-Encoder for Variable Length Respiratory Sound Compression and Reconstruction. BioCAS Shuailin Tao, Jinhai Hu, Wang Ling Goh, Yuan Gao
2024	—	`conf`	DWT-PoolFormer: Discrete Wavelet Transform-based Quantized Parallel PoolFormer Network Implemented in FPGA for Wearable ECG Monitoring. BioCAS Tiancheng Cao, Wei Soon Ng, Wang Ling Goh, Yuan Gao
2024	C	`conf`	High Accuracy and Low Latency Mixed Precision Neural Network Acceleration for TinyML Applications on Resource-Constrained FPGAs. ISCAS Wei Soon Ng, Wang Ling Goh, Yuan Gao
2024	—	`conf`	LSTM-based ECG Signal Classification with Multi-level One-hot Encoding for Wearable Applications. BioCAS Jinhai Hu, Wang Ling Goh, Yuan Gao
2024	A*	`conf`	Late Breaking Results: Circuit-Algorithm Co-design for Learnable Audio Analog Front-End. DAC Jinhai Hu, Zhongyi Zhang, Cong Sheng Leow, Wang Ling Goh, Yuan Gao
2024	C	`conf`	Quantum Readout Processing Accelerator with a CORDIC Core at Cryogenic Temperature. ISCAS Yi Sheng Chong, Hongyu Cao, Wang Ling Goh, Patrick Bore, Yuanzheng Paul Tan, Yung Szen Yap, Rainer Dumke, Vishnu P. Nambiar, Anh Tuan Do
2024	C	`conf`	Squeeze-Excite Fusion Based Multimodal Neural Network for Sleep Stage Classification with Flexible EEG/ECG Signal Acquisition Circuit. ISCAS Shuailin Tao, Jinhai Hu, Wang Ling Goh, Yuan Gao
2023	C	`conf`	282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing. ISCAS Qibang Zang, Wang Ling Goh, Lu Lu, Chengshuo Yu, Junjie Mu, Tony Tae-Hyoung Kim, Bongjin Kim, Dongrui Li, Anh Tuan Do
2023	—	`conf`	4b/4b/8b Precision Charge-Domain 8T-SRAM Based CiM for CNN Processing. AICAS Qibang Zang, Wang Ling Goh, Yi Sheng Chong, Anh Tuan Do
2023	C	`conf`	A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. ISCAS Chen Shen, Junran Pu, Yi Sheng Chong, Zhongyi Zhang, Wang Ling Goh, Bin Zhao, Anh Tuan Do, Yuan Gao
2023	—	`conf`	A Battery-input Hysteretic Buck Converter with 430nA Quiescent Current and 5×10 BioCAS Ziming Liu, Wang Ling Goh, Liter Siek, Yuan Gao
2023	—	`conf`	A Convolved Self-Attention Model for IMU-based Gait Detection and Human Activity Recognition. AICAS Shuailin Tao, Wang Ling Goh, Yuan Gao
2023	C	`conf`	A Nanowatt Temperature-Independent Tunable Active Capacitance Multiplier with DC Compensation in $0.13-\mu\mathrm{m}$ CMOS. ISCAS Zhongyi Zhang, Tantan Zhang, Chen Shen, Wang Ling Goh, Yuan Gao
2023	—	`conf`	A Ternary Weight Mapping and Charge-mode Readout Scheme for Energy Efficient FeRAM Crossbar Compute-in-Memory System. AICAS Tiancheng Cao, Zhongyi Zhang, Wang Ling Goh, Chen Liu, Yao Zhu, Yuan Gao
2023	C	`conf`	Classification of ECG Anomaly with Dynamically-biased LSTM for Continuous Cardiac Monitoring. ISCAS Jinhai Hu, Wang Ling Goh, Yuan Gao
2023	—	`conf`	ECG Classification using Binary CNN on RRAM Crossbar with Nonidealities-Aware Training, Readout Compensation and CWT Preprocessing. BioCAS Tiancheng Cao, Zhongyi Zhang, Wang Ling Goh, Chen Liu, Yao Zhu, Yuan Gao
2023	—	`conf`	Energy Efficient Software-hardware Co-design of Quantized Recurrent Convolutional Neural Network for Continuous Cardiac Monitoring. AICAS Jinhai Hu, Cong Sheng Leow, Wang Ling Goh, Yuan Gao
2023	C	`conf`	RRAM-PoolFormer: A Resistive Memristor-based PoolFormer Modeling and Training Framework for Edge-AI Applications. ISCAS Tiancheng Cao, Weihao Yu, Yuan Gao, Chen Liu, Shuicheng Yan, Wang Ling Goh
2023	C	`conf`	Sparsity Through Spiking Convolutional Neural Network for Audio Classification at the Edge. ISCAS Cong Sheng Leow, Wang Ling Goh, Yuan Gao
2023	—	`conf`	Supervised Contrastive Pretrained ResNet with MixUp to Enhance Respiratory Sound Classification on Imbalanced and Limited Dataset. BioCAS Jinhai Hu, Cong Sheng Leow, Shuailin Tao, Wang Ling Goh, Yuan Gao
2022	C	`conf`	0.08mm ISCAS Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do
2022	J	`jnl`	A 2.5 μW KWS Engine With Pruned LSTM and Embedded MFCC for IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs Yi Sheng Chong, Wang Ling Goh, Vishnu P. Nambiar, Anh-Tuan Do
2022	J	`jnl`	A Non-Idealities Aware Software-Hardware Co-Design Framework for Edge-AI Deep Neural Network Implemented on Memristive Crossbar. IEEE J. Emerg. Sel. Topics Circuits Syst. Tiancheng Cao, Chen Liu, Weijie Wang, Tantan Zhang, Hock Koon Lee, Ming Hua Li, Wendong Song, Zhixian Chen, Victor Yi-Qian Zhuo, Nan Wang, Yao Zhu, Yuan Gao, Wang Ling Goh
2022	—	`conf`	Noise-Aware and Lightweight LSTM for Keyword Spotting Applications. ISOCC Yingfeng Wang, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do
2022	J	`jnl`	Parasitic-Aware Modeling and Neural Network Training Scheme for Energy-Efficient Processing-in-Memory With Resistive Crossbar Array. IEEE J. Emerg. Sel. Topics Circuits Syst. Tiancheng Cao, Chen Liu, Yuan Gao, Wang Ling Goh
2022	C	`conf`	Recovering Accuracy of RRAM-based CIM for Binarized Neural Network via Chip-in-the-loop Training. ISCAS Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do
2022	—	`conf`	Temperature Compensation on SRAM-Based Computation in Memory Array. ISOCC Qibang Zang, Wang Ling Goh, Fei Li, Lu Lu, Anh Tuan Do
2021	J	`jnl`	A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Ming Ming Wong, Anh Tuan Do
2021	—	`conf`	A Backpropagation Extreme Learning Machine Approach to Fast Training Neural Network-Based Side-Channel Attack. AsianHOST Xuyang Huang, Ming Ming Wong, Anh Tuan Do, Wang Ling Goh
2021	J	`jnl`	A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations. IEEE Trans. Circuits Syst. II Express Briefs Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Anh-Tuan Do
2021	J	`jnl`	A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. IEEE Trans. Circuits Syst. II Express Briefs Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Yi Sheng Chong, Anh Tuan Do
2021	C	`conf`	An Energy-Efficient Convolution Unit for Depthwise Separable Convolutional Neural Networks. ISCAS Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do
2021	C	`conf`	Design of Fully Differential Energy-Efficient Inverter-Based Low-Noise Amplifier for Ultrasound Imaging. VLSI-SoC Zhaoyang Cao, Tan-Tan Zhang, Yuan Gao, Wang Ling Goh
2021	—	`conf`	Dynamically-biased Fixed-point LSTM for Time Series Processing in AIoT Edge Device. AICAS Jinhai Hu, Wang Ling Goh, Yuan Gao
2021	C	`conf`	Efficient Implementation of Activation Functions for LSTM accelerators. VLSI-SoC Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do
2021	J	`jnl`	Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
2021	—	`conf`	Parasitic-Aware Modelling for Neural Networks Implemented with Memristor Crossbar Array. MCSoC Tiancheng Cao, Chen Liu, Yuan Gao, Wang Ling Goh
2020	—	`conf`	0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
2020	J	`jnl`	A 3-MHz 17.3- $\mu$ W 0.015% Period Jitter Relaxation Oscillator With Energy Efficient Swing Boosting. IEEE Trans. Circuits Syst. II Express Briefs Wei Zhou, Wang Ling Goh, Yuan Gao
2020	J	`jnl`	A TDM-Based 16-Channel AFE ASIC With Enhanced System-Level CMRR for Wearable EEG Recording With Dry Electrodes. IEEE Trans. Biomed. Circuits Syst. Tao Tang, Wang Ling Goh, Lei Yao, Yuan Gao
2020	J	`jnl`	An Integrated Multi-Channel Biopotential Recording Analog Front-End IC With Area-Efficient Driven-Right-Leg Circuit. IEEE Trans. Biomed. Circuits Syst. Tao Tang, Wang Ling Goh, Lei Yao, Jia Hao Cheong, Yuan Gao
2020	J	`jnl`	Bottom-Up Scene Text Detection with Markov Clustering Networks. Int. J. Comput. Vis. Zichuan Liu, Guosheng Lin, Wang Ling Goh
2020	C	`conf`	Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do
2019	C	`conf`	A 1.6MHz Swing-Boosted Relaxation Oscillator with ±0.15%/V 23.4ppm/°C Frequency Inaccuracy using Voltage-to-Delay Feedback. ISCAS Wei Zhou, Wang Ling Goh, Yuan Gao
2019	—	`conf`	A 100-mVpp Input Range 10-kHz BW VCO-based CT-DSM Neuro-Recording IC in 40-nm CMOS. SoCC Wei Zhou, Wang Ling Goh, Yi Chen, Tantan Zhang, Yuan Gao
2019	J	`jnl`	A 34-FPS 698-GOP/s/W Binarized Deep Neural Network-Based Natural Scene Text Interpretation Accelerator for Mobile Edge Computing. IEEE Trans. Ind. Electron. Yixing Li, Zichuan Liu, Wenye Liu, Yu Jiang, Yongliang Wang, Wang Ling Goh, Hao Yu, Fengbo Ren
2019	C	`conf`	Block-Based Spiking Neural Network Hardware with Deme Genetic Algorithm. ISCAS Junran Pu, Vishnu P. Nambiar, Anh-Tuan Do, Wang Ling Goh
2019	—	`conf`	Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. SoCC Yun Kwan Lee, Vishnu P. Nambiar, Junran Pu, Wang Ling Goh, Anh-Tuan Do
2019	—	`conf`	Data-Driven Attack Anomaly Detection in Public Transport Networks. APWCS Yin Rui, Nicholas Heng-Loong Wong, Huaqun Guo, Wang Ling Goh
2019	—	`conf`	Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. SoCC Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do
2019	A*	`conf`	Towards Robust Curve Text Detection With Conditional Spatial Expansion. CVPR Zichuan Liu, Guosheng Lin, Sheng Yang, Fayao Liu, Weisi Lin, Wang Ling Goh
2019	J	`jnl`	Towards Robust Curve Text Detection with Conditional Spatial Expansion. CoRR Zichuan Liu, Guosheng Lin, Sheng Yang, Fayao Liu, Weisi Lin, Wang Ling Goh
2018	J	`jnl`	A 10-Bit 300 kS/s Reference-Voltage Regulator Free SAR ADC for Wireless-Powered Implantable Medical Devices. Sensors Yongkui Yang, Jun Zhou, Xin Liu, Wang Ling Goh
2018	C	`conf`	A 16.6 μW 3.12 MHz RC Relaxation Oscillator with 160.3 dBc/Hz FOM. ISCAS Wei Zhou, Wang Ling Goh, Jia Hao Cheong, Yuan Gao
2018	C	`conf`	A Rectifier-less Energy Harvesting Interface Circuit for Low-Voltage Piezoelectric Transducers. ISCAS Arish Shareef, Wang Ling Goh, Srikanth Narasimalu, Yuan Gao
2018	—	`conf`	An Advanced Firewall Rule Matching Algorithm. SOLI Elvira Febiani, Huaqun Guo, Wang Ling Goh
2018	J	`jnl`	Correlation Propagation Networks for Scene Text Detection. CoRR Zichuan Liu, Guosheng Lin, Wang Ling Goh, Fayao Liu, Chunhua Shen, Xiaokang Yang
2018	—	`conf`	Detecting anomalies in metro systems. WF-IoT Marcellinus Hendro Adi Wibowo, Huaqun Guo, Wang Ling Goh
2018	C	`conf`	Feasibility of dictionary-based sparse coding for data compression in machine condition-based monitoring. ICIS Wang Ling Goh, Nicholas Sadjoli
2018	A*	`conf`	Learning Markov Clustering Networks for Scene Text Detection. CVPR Zichuan Liu, Guosheng Lin, Sheng Yang, Jiashi Feng, Weisi Lin, Wang Ling Goh
2018	J	`jnl`	Learning Markov Clustering Networks for Scene Text Detection. CoRR Zichuan Liu, Guosheng Lin, Sheng Yang, Jiashi Feng, Weisi Lin, Wang Ling Goh
2018	A*	`conf`	SqueezedText: A Real-Time Scene Text Recognition by Binary Convolutional Encoder-Decoder Network. AAAI Zichuan Liu, Yixing Li, Fengbo Ren, Wang Ling Goh, Hao Yu
2017	—	`conf`	A 16-channel TDM analog front-end with enhanced system CMRR for wearable dry EEG recording. A-SSCC Tao Tang, Wang Ling Goh, Lei Yao, Yuan Gao
2017	—	`conf`	A TDM-based multi-channel analog front-end for wearable dry EEG recording system. NEWCAS Tao Tang, Wang Ling Goh, Lei Yao, Yuan Gao
2017	C	`conf`	A passively compensated capacitive sensor readout with biased varactor temperature compensation and temperature coherent quantization. ISCAS Yong Wang, Yan Hong, Wang Ling Goh, Kevin T. C. Chai, Xin Lou, Wen Bin Ye
2017	—	`conf`	An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit. EMBC Tao Tang, Wang Ling Goh, Lei Yao, Jia Hao Cheong, Yuan Gao
2017	J	`jnl`	Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load. Int. J. Circuit Theory Appl. Ming Wai Lau, Kai Ho Mak, Ka Nang Leung, Jianping Guo, Wang Ling Goh
2016	—	`conf`	A 0.18µm, 0.6V, 83.5µW integer DCT processor for neural signal applications. ISIC Tao Tang, Wang Ling Goh, Xin Liu, Chao Wang
2016	—	`conf`	A 10 to 170 GHz distributed amplifier using 130-nm SiGe HBTs. ISIC Yihu Li, Wang Ling Goh, Hailin Tang, Haitao Liu, Xiaodong Deng, Yong-Zhong Xiong
2016	—	`conf`	A 12.4-kHz on-chip RC oscillator with comparator offset cancellation for PVT variation tolerance. ISIC Jiacheng Wang, Wang Ling Goh
2016	J	`jnl`	A 12.77-MHz 31 ppm/°C On-Chip RC Relaxation Oscillator With Digital Compensation Technique. IEEE Trans. Circuits Syst. I Regul. Pap. Jiacheng Wang, Wang Ling Goh, Xin Liu, Jun Zhou
2016	C	`conf`	A 13.5-MHz relaxation oscillator with ±0.5% temperature stability for RFID application. ISCAS Jiacheng Wang, Wang Ling Goh
2016	J	`jnl`	A 151-nW Adaptive Delta-Sampling ADC for Ultra-Low Power Sensing Applications. IEEE Trans. Circuits Syst. II Express Briefs Yongkui Yang, Jun Zhou, Xin Liu, Jia Hao Cheong, Wang Ling Goh
2016	—	`conf`	A 9.84-73.2 nJ, 0.048 mm VLSI Circuits Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao, Lei Yao
2016	J	`jnl`	A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages. IEEE Trans. Very Large Scale Integr. Syst. Marco Ho, Jianping Guo, Tin Wai Mui, Kai Ho Mak, Wang Ling Goh, Hiu Ching Poon, Shi Bu, Ming Wai Lau, Ka Nang Leung
2016	—	`conf`	A modified PiBVD model for Lamb wave resonator. ISIC Yong Wang, Yan Hong, Wang Ling Goh, Xiaojing Mu, Kevin T. C. Chai
2016	—	`conf`	A self biased full range current sensor for buck regulator. APCCAS Chundong Wu, Wang Ling Goh, Wei Mao, Lei Wang, Yat-Hei Lam, Alan Chang, Yong Lian
2016	—	`conf`	A start-up free 200nW bandgap voltage reference. NEWCAS Chundong Wu, Wang Ling Goh, Yongkui Yang, Alan Chang, Xi Zhu, Lei Wang
2016	—	`conf`	Analysis of monolithic I/Q based impedance measurement circuits: Impact of non-ideal circuit effects on accuracies. ISIC Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao, Lei Yao
2016	J	`jnl`	Asymmetrical Dead-Time Control Driver for Buck Regulator. IEEE Trans. Very Large Scale Integr. Syst. Chundong Wu, Wang Ling Goh, Chiang Liang Kok, Liter Siek, Yat-Hei Lam, Xi Zhu, Ravinder Pal Singh
2016	Misc	`conf`	Optimization of codes for the joint Viterbi detector decoder (JVDD). ICNC Sari Shafidah Binte Shafiee, Kheong Sann Chan, Wang Ling Goh
2016	—	`conf`	Synchronous Electric Charge Extraction for low voltage Piezoelectric Energy Harvester array. ISIC Arish Shareef, Wang Ling Goh, Yuan Gao, Srikanth Narasimalu
2015	J	`jnl`	A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW. IEEE J. Solid State Circuits Kai Ho Mak, Ming Wai Lau, Jianping Guo, Tin Wai Mui, Marco Ho, Wang Ling Goh, Ka Nang Leung
2015	—	`conf`	A 12.77-MHz on-chip relaxation oscillator with digital compensation for loop delay variation. A-SSCC Jiacheng Wang, Wang Ling Goh, Xin Liu, Jun Zhou
2015	—	`conf`	A 124 to 132.5 GHz frequency quadrupler with 4.4 dBm output power in 0.13μm SiGe BiCMOS. ESSCIRC Yihu Li, Wang Ling Goh, Yong-Zhong Xiong
2015	—	`conf`	A current-excited triple-time-voltage oversampling method for bio-impedance model for cost-efficient circuit system. EMBC Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao, Lei Yao
2015	—	`conf`	A low TC, supply independent and process compensated current reference. CICC Chundong Wu, Wang Ling Goh, Chiang Liang Kok, Wanlan Yang, Liter Siek
2015	J	`jnl`	An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing. IEEE Trans. Circuits Syst. II Express Briefs Xin Liu, Jun Zhou, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang, Xin Zhang, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je
2015	C	`conf`	Design considerations of STCB OTA in CMOS 65nm with large capacitive loads. ISCAS Kai Ho Mak, Marco Ho, Ka Nang Leung, Wang Ling Goh
2015	J	`jnl`	Efficient Two-Write WOM-Codes for Non-Volatile Memories. IEEE Commun. Lett. Melissa Wan Jun Chua, Kui Cai, Wang Ling Goh
2014	—	`conf`	A 0.5-V sub-μW/channel neural recording IC with delta-modulation-based spike detection. A-SSCC Seong-Jin Kim, Lei Liu, Lei Yao, Wang Ling Goh, Yuan Gao, Minkyu Je
2014	J	`jnl`	A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring. IEEE J. Solid State Circuits Xin Liu, Jun Zhou, Yongkui Yang, Bo Wang, Jingjing Lan, Chao Wang, Jianwen Luo, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je
2014	—	`conf`	A three-topology based, wide input range switched-capacitor DC-DC converter with low-ripple and enhanced load line regulations. ISIC Hendika Fatkhi Nurhuda, Yongkui Yang, Wang Ling Goh
2014	J	`jnl`	High-Throughput Cognitive-Amplification Detector for LDPC Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. Melvin Heng Li Lim, Wang Ling Goh
2013	J	`jnl`	A 100-Channel 1-mW Implantable Neural Recording IC. IEEE Trans. Circuits Syst. I Regul. Pap. Xiaodan Zou, Lei Liu, Jia Hao Cheong, Lei Yao, Peng Li, Ming-Yuan Cheng, Wang Ling Goh, Ramamoorthy Rajkumar, Gavin Stewart Dawe, Kuang-Wei Cheng, Minkyu Je
2013	C	`conf`	High-throughput dual-shift stochastic-detection quasi-cyclic LDPC decoder. ICICS Melvin Heng Li Lim, Wang Ling Goh
2013	J	`jnl`	Intrinsic Distortion of a Fully Differential BD-Modulated Class-D Amplifier With Analog Feedback. IEEE Trans. Circuits Syst. I Regul. Pap. Stephen M. Cox, Jun Yu, Wang Ling Goh, Meng Tong Tan
2013	—	`conf`	Neural recording front-end IC using action potential detection and analog buffer with digital delay for data compression. EMBC Lei Liu, Lei Yao, Xiaodan Zou, Wang Ling Goh, Minkyu Je
2012	J	`jnl`	A 5-Gb/s Automatic Gain Control Amplifier With Temperature Compensation. IEEE J. Solid State Circuits Chang Liu, Yue-Peng Yan, Wang Ling Goh, Yong-Zhong Xiong, Li-jun Zhang, Mohammad Madihian
2012	J	`jnl`	A 60-V, >225°C Half-Bridge Driver for Piezoelectric Acoustic Transducer, on SOI CMOS. IEEE Trans. Circuits Syst. II Express Briefs Jun Yu, Wang Ling Goh, Muthukumaraswamy Annamalai Arasu, Minkyu Je
2012	—	`conf`	A 9% power efficiency 121-to-137GHz phase-controlled push-push frequency quadrupler in 0.13μm SiGe BiCMOS. ISSCC Yong Wang, Wang Ling Goh, Yong-Zhong Xiong
2012	J	`jnl`	A Dual-Feedforward Carrier-Modulated Second-Order Class-D Amplifier With Improved THD. IEEE Trans. Circuits Syst. II Express Briefs Jun Yu, Meng Tong Tan, Wang Ling Goh, Stephen M. Cox
2012	—	`conf`	A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels. ISPACS Melvin Heng Li Lim, Wang Ling Goh, Zhiliang Qin
2012	—	`conf`	Two-write WOM-Codes for Non-Volatile Memories. ISPACS Melissa Wan Jun Chua, Kui Cai, Wang Ling Goh
2011	—	`conf`	A miniaturized heterogeneous wireless sensor node in 3DIC. 3DIC Xin Liu, Lei Wang, Mini Jayakrishnan, Jingjing Lan, Hongyu Li, Chong Ser Choong, M. Kumarasamy Raja, Yongxin Guo, Wang Ling Goh, Jin He, Shan Gao, Minkyu Je
2011	J	`jnl`	Power-Efficient Explicit-Pulsed Dual-Edge Triggered Sense-Amplifier Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. Myint Wai Phyu, Kangkang Fu, Wang Ling Goh, Kiat Seng Yeo
2011	—	`conf`	Ultra low-power high-speed flexible Probabilistic Adder for Error-Tolerant Applications. ISOCC Ning Zhu, Wang Ling Goh, Kiat Seng Yeo
2010	J	`jnl`	Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing. IEEE Trans. Very Large Scale Integr. Syst. Ning Zhu, Wang Ling Goh, Weija Zhang, Kiat Seng Yeo, Zhi-Hui Kong
2009	J	`jnl`	A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning. IEEE Trans. Very Large Scale Integr. Syst. Hai Qi Liu, Wang Ling Goh, Liter Siek, Wei Meng Lim, Yue Ping Zhang
2008	—	`conf`	Body-bootstrapped-buffer circuit for CMOS static power reduction. APCCAS Liang-Yu Loy, Weija Zhang, Zhi-Hui Kong, Wang Ling Goh, Kiat Seng Yeo
2005	—	`conf`	1.8-V 10-GHZ ring VCO design using 0.18-μm CMOS technology. SoCC Hai Qi Liu, Wang Ling Goh, Liter Siek
2005	—	`conf`	A 0.18-µm 10-GHz CMOS ring oscillator for optical transceivers. ISCAS (2) Hai Qi Liu, Wang Ling Goh, Liter Siek
2005	—	`conf`	A low-power static dual edge-triggered flip-flop using an output-controlled discharge configuration. ISCAS (3) Myint Wai Phyu, Wang Ling Goh, Kiat Seng Yeo