Wang Jiang Chau

15 papers Unranked 15
YearRankTypeTitle / Venue / Authors
2021 — conf
Accelerating the base-level alignment step of DNA assembling in Minimap2 Algorithm using FPGA.
LASCAS
Carolina Teng, Renan W. Achjian, Caio C. Braga, Marcelo Knörich Zuffo, Wang Jiang Chau
2019 — conf
Exploring Tabu search based algorithms for mapping and placement in NoC-based reconfigurable systems.
SBCCI
Guilherme Apolinario Silva Novaes, Luiz Carlos Moreira, Wang Jiang Chau
2019 — conf
Mapping and Placement in NoC-based Reconfigurable Systems Using an Adaptive Tabu Search Algorithm.
LASCAS
Guilherme Apolinario Silva Novaes, Luiz Carlos Moreira, Wang Jiang Chau
2018 — conf
On TLM traffic accuracy: A multifractal perspective.
LASCAS
Jose Eduardo Chiarelli Bueno Filho, Wang Jiang Chau
2013 — conf
A strategy for mapping reconfigurable cores in NoCs.
LASCAS
Jonas Gomes Filho, Marius Strum, Wang Jiang Chau
2013 — conf
Long range dependence in intrachip transaction level traffic.
LASCAS
Jorge González, Gustavo A. Patiño-Álvarez, Marius Strum, Wang Jiang Chau
2013 — conf
QoS 3D-HoC hybrid-on-chip communication structure for dynamic 3D-MPSoCs.
LASCAS
Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, César Pedraza, Wang Jiang Chau, Marius Strum
2011 — conf
Formally verifying an RTOS scheduling monitor IP core in embedded systems.
LATW
Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau, Fabian Vargas
2010 — conf
Automatic generation of a parameter-domain-based functional input coverage model.
LATW
Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau
2002 — conf
A Comparison Between Test Pattern Generation Strategies for Functional Units in BIST Applications.
LATW
Wang Jiang Chau, Paulo Sérgio Cardoso, Marius Strum, Ricardo Pires
2002 — conf
BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units.
LATW
Wang Jiang Chau, Jose Artur Quilici González, Marius Strum, Ricardo Pires
2001 — conf
Synthesis of Multi-Burst Controllers as Modified Huffman Machines.
SBCCI
Duarte Lopes de Oliveira, Wagner Chiepa Cunha, Marius Strum, Wang Jiang Chau
2000 — conf
Self Test Built-in Plan for Data-Path Functional Units.
LATW
Jose Artur Quilici González, José Roberto de A. Amazonas, Marius Strum, Wang Jiang Chau
2000 — conf
Synthesis of High Performance Extended Burst Mode Asynchronous State Machines.
SBCCI
Duarte Lopes de Oliveira, Marius Strum, Wang Jiang Chau, Wagner Chiepa Cunha
1998 — conf
Exploring Concurrency in Data Path Functional Units BIST Plan Optimization: A Study-Case.
SBCCI
José Roberto de A. Amazonas, Marius Strum, Wang Jiang Chau