Walter Huang

14 papers C 1Misc 2Journal 7Unranked 3
YearRankTypeTitle / Venue / Authors
2021 — conf
A Novel Model-Based Security Scheme for LoRa Key Generation.
IPSN
Jiayao Gao, Weitao Xu, Salil S. Kanhere, Sanjay Jha, Jun Young Kim, Walter Huang, Wen Hu
2020 J jnl
A Novel Emergency Light Based Smart Building Solution: Design, Implementation and Use Cases.
CoRR
Weitao Xu, Jin Zhang, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay K. Jha, Wen Hu, Prasant Misra
2020 — conf
EMIoT: A LoRa-enabled Smart Building Solution Based on Emergency Lights.
BuildSys
Weitao Xu, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay K. Jha, Wen Hu
2020 J jnl
Measurement, Characterization, and Modeling of LoRa Technology in Multifloor Buildings.
IEEE Internet Things J.
Weitao Xu, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay K. Jha, Wen Hu
2019 J jnl
Measurement, Characterization and Modeling of LoRa Technology in Multi-floor Buildings.
CoRR
Weitao Xu, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay Jha, Wen Hu
2019 J jnl
The Design, Implementation, and Deployment of a Smart Lighting System for Smart Buildings.
IEEE Internet Things J.
Weitao Xu, Jin Zhang, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay K. Jha, Wen Hu
2011 J jnl
Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters.
J. Signal Process. Syst.
Walter Huang, David V. Anderson
2009 Misc conf
Adaptive filters using modified sliding-block distributed arithmetic with offset binary coding.
ICASSP
Walter Huang, David V. Anderson
2009 — —
Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic.
Walter Huang
2008 J jnl
A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering.
IEEE Trans. Circuits Syst. I Regul. Pap.
Erhan Özalevli, Walter Huang, Paul E. Hasler, David V. Anderson
2007 C conf
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter.
ISCAS
Erhan Ozalevli, Walter Huang, Paul E. Hasler, David V. Anderson
2005 J jnl
LMS adaptive filters using distributed arithmetic for high throughput.
IEEE Trans. Circuits Syst. I Regul. Pap.
Daniel J. Allred, Heejong Yoo, Venkatesh Krishnan, Walter Huang, David V. Anderson
2004 — conf
A novel high performance distributed arithmetic adaptive filter implementation on an FPGA.
ICASSP (5)
Daniel J. Allred, Heejong Yoo, Venkatesh Krishnan, Walter Huang, David V. Anderson
2004 Misc conf
An FPGA Implementation for a High Throughput Adaptive Filter Using Distributed Arithmetic.
FCCM
Daniel J. Allred, Walter Huang, Venkatesh Krishnan, Heejong Yoo, David V. Anderson