Walter Guggenbühl

17 papers A 1Misc 1Journal 7Unranked 8
YearRankTypeTitle / Venue / Authors
1995 J jnl
Fast neural net simulation with a DSP processor array.
IEEE Trans. Neural Networks
Urs A. Müller, Anton Gunzinger, Walter Guggenbühl
1994 J jnl
Switched-current memory circuits for high-precision applications.
IEEE J. Solid State Circuits
Walter Guggenbühl, Jiandong Di, Josef Goette
1993 J jnl
How to program and configure a heterogeneous multiprocessor.
Mach. Vis. Appl.
Markus Zeltner, Bruno Schneuwly, Walter Guggenbühl
1993 J jnl
Layout-dependent fault analysis and test synthesis for CMOS circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Marcel Jacomet, Walter Guggenbühl
1993 — conf
Neural net simulation with MUSIC.
ICNN
Urs A. Müller, Anton Gunzinger, Walter Guggenbühl
1992 A conf
Achieving Super Computer Performance with a DSP Array Processor.
SC
Anton Gunzinger, Urs A. Müller, Walter Scott, Bernhard Bäumle, Peter Kohler, Johann vonder Mühll, Florian Müller-Plathe, Wilfred F. van Gunsteren, Walter Guggenbühl
1992 J jnl
Achieving supercomputer performane for neural net simulation with an array of digital signal processors.
IEEE Micro
Urs A. Müller, Bernhard Bäumle, Peter Kohler, Anton Gunzinger, Walter Guggenbühl
1992 J jnl
Analog CMOS implementation of a multilayer perceptron with nonlinear synapses.
IEEE Trans. Neural Networks
Jerzy B. Lont, Walter Guggenbühl
1992 — conf
Architecture and realization of a multi signal processor system.
ASAP
Anton Gunzinger, Urs A. Müller, Walter Scott, Bernhard Bäumle, Peter Kohler, Walter Guggenbühl
1991 — conf
3D Scene Acquisition by Motion Induced Stereo.
DAGM-Symposium
Peter Schaeren, Bruno Schneuwly, Walter Guggenbühl
1991 J jnl
Simulation lossless symmetrical three conductor systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Walter Guggenbühl, Guy Morbach, Michael Schaller
1990 — conf
SYDAMA II: A Heterogeneous Multiprocessor System for Real Time Image Processing.
CONPAR
D. Stokar, Anton Gunzinger, Walter Guggenbühl, Edi Hiltebrand, Severin Mathis, Peter Schaeren, Bruno Schneuwly, Markus Zeltner
1990 — conf
The synchronous dataflow machine: a computer architecture for real time image processing.
ICPR (2)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
1989 — conf
The SYnchronous DAtaflow MAchine: Architecture and Performance.
PARLE (1)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
1988 Misc conf
A reconfigurable systolic array for real-time image processing.
ICASSP
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
1988 — conf
Datenflussrechner zur Echtzeitbildverarbeitung: Anwendungen.
DAGM-Symposium
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
1987 — conf
Datenflußrechner zur Echtzeitbildverarbeitung: Softwareentwicklungsumgebung.
DAGM-Symposium
Anton Gunzinger, Severin Mathis, Walter Guggenbühl