Walid A. Najjar

150 papers A* 8A 15B 21C 4Misc 18Journal 44Unranked 35

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	First Twenty Years of the International Symposium on Applied Reconfigurable Computing (ARC): A Selection of Papers. ARC João M. P. Cardoso, Walid A. Najjar
2021	J	`jnl`	Acceleration of Parallel-Blocked QR Decomposition of Tall-and-Skinny Matrices on FPGAs. ACM Trans. Archit. Code Optim. Jose M. Rodriguez Borbon, Junjie Huang, Bryan M. Wong, Walid A. Najjar
2021	J	`jnl`	Efficient local locking for massively multithreaded in-memory hash-based operators. VLDB J. Bashar Romanous, Skyler Windh, Ildar Absalyamov, Prerna Budhkar, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras
2020	J	`jnl`	Heterogeneous Acceleration of HAR Applications. IEEE Trans. Circuits Syst. Video Technol. Jose M. Rodriguez Borbon, Xiaoyin Ma, Amit K. Roy-Chowdhury, Walid A. Najjar
2020	Misc	`conf`	High-Performance Parallel Radix Sort on FPGA. FCCM Bashar Romanous, Mohammadreza Rezvani, Junjie Huang, Daniel Wong, Evangelos E. Papalexakis, Vassilis J. Tsotras, Walid A. Najjar
2019	J	`jnl`	Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads. ACM Trans. Archit. Code Optim. Prerna Budhkar, Ildar Absalyamov, Vasileios Zois, Skyler Windh, Walid A. Najjar, Vassilis J. Tsotras
2019	J	`jnl`	Efficient Main-Memory Top-K Selection For Multicore Architectures. Proc. VLDB Endow. Vasileios Zois, Vassilis J. Tsotras, Walid A. Najjar
2019	—	`conf`	GPU Accelerated Top-K Selection With Efficient Early Stopping. ADMS@VLDB Vasileios Zois, Vassilis J. Tsotras, Walid A. Najjar
2019	J	`jnl`	PDES-A: Accelerators for Parallel Discrete Event Simulation Implemented on FPGAs. ACM Trans. Model. Comput. Simul. Shafiur Rahman, Nael B. Abu-Ghazaleh, Walid A. Najjar
2018	B	`conf`	Massively parallel skyline computation for processing-in-memory architectures. PACT Vasileios Zois, Divya Gupta, Vassilis J. Tsotras, Walid A. Najjar, Jean-François Roy
2017	—	`conf`	PDES-A: a Parallel Discrete Event Simulation Accelerator for FPGAs. SIGSIM-PADS Shafiur Rahman, Nael B. Abu-Ghazaleh, Walid A. Najjar
2016	B	`ed.`	26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016 FPL Paolo Ienne, Walid A. Najjar, Jason Helge Anderson, Philip Brisk, Walter Stechele
2016	C	`conf`	FPGA-accelerated group-by aggregation using synchronizing caches. DaMoN Ildar Absalyamov, Prerna Budhkar, Skyler Windh, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras
2016	—	`ed.`	International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016, Agios Konstantinos, Samos Island, Greece, July 17-21, 2016 SAMOS Walid A. Najjar, Andreas Gerstlauer
2016	B	`conf`	Optimizing hardware design for Human Action Recognition. FPL Xiaoyin Ma, Jose M. Rodriguez Borbon, Walid A. Najjar, Amit K. Roy-Chowdhury
2016	B	`conf`	Preface. FPL Paolo Ienne, Walid A. Najjar, Jason Helge Anderson, Philip Brisk, Walter Stechele
2016	—	`ch.`	ROCCC 2.0. FPGAs for Software Programmers Walid A. Najjar, Jason R. Villarreal, Robert J. Halstead
2015	A	`conf`	CAMs as Synchronizing Caches for Multithreaded Irregular Applications on FPGAs. ICCAD Skyler Windh, Prerna Budhkar, Walid A. Najjar
2015	J	`jnl`	Evaluation and Acceleration of High-Throughput Fixed-Point Object Detection on FPGAs. IEEE Trans. Circuits Syst. Video Technol. Xiaoyin Ma, Walid A. Najjar, Amit K. Roy-Chowdhury
2015	J	`jnl`	FHAST: FPGA-Based Acceleration of Bowtie in Hardware. IEEE ACM Trans. Comput. Biol. Bioinform. Edward B. Fernandez, Jason R. Villarreal, Stefano Lonardi, Walid A. Najjar
2015	A	`conf`	FPGA-based Multithreading for In-Memory Hash Joins. CIDR Robert J. Halstead, Ildar Absalyamov, Walid A. Najjar, Vassilis J. Tsotras
2015	J	`jnl`	High performance FPGA and GPU complex pattern matching over spatio-temporal streams. GeoInformatica Roger Moussalli, Ildar Absalyamov, Marcos R. Vieira, Walid A. Najjar, Vassilis J. Tsotras
2015	J	`jnl`	High-Level Language Tools for Reconfigurable Computing. Proc. IEEE Skyler Windh, Xiaoyin Ma, Robert J. Halstead, Prerna Budhkar, Zabdiel Luna, Omar Hussaini, Walid A. Najjar
2014	J	`jnl`	A study on parallelizing XML path filtering using accelerators. ACM Trans. Embed. Comput. Syst. Roger Moussalli, Mariam Salloum, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras
2014	J	`jnl`	Compiling irregular applications for reconfigurable systems. Int. J. High Perform. Comput. Netw. Robert J. Halstead, Jason R. Villarreal, Walid A. Najjar
2014	Misc	`conf`	High-Throughput Fixed-Point Object Detection on FPGAs. FCCM Xiaoyin Ma, Walid A. Najjar, Amit K. Roy-Chowdhury
2014	J	`jnl`	Reconfigurable Computing. IEEE Micro Walid A. Najjar, Paolo Ienne
2013	Misc	`conf`	A High Throughput No-Stall Golomb-Rice Hardware Decoder. FCCM Roger Moussalli, Walid A. Najjar, Xi Luo, Amna Khan
2013	Misc	`conf`	Compiled multithreaded data paths on FPGAs for dynamic workloads. CASES Robert J. Halstead, Walid A. Najjar
2013	—	`conf`	Efficient near-duplicate document detection using FPGAs. IEEE BigData Xi Luo, Walid A. Najjar, Vagelis Hristidis
2013	A*	`conf`	FPGA code accelerators - the compiler perspective. DAC Walid A. Najjar, Jason R. Villarreal
2013	—	`conf`	High-Performance XML Twig Filtering using GPUs. ADMS@VLDB Ildar Absalyamov, Roger Moussalli, Vassilis J. Tsotras, Walid A. Najjar
2013	B	`conf`	Stream-Mode FPGA Acceleration of Complex Pattern Trajectory Querying. SSTD Roger Moussalli, Marcos R. Vieira, Walid A. Najjar, Vassilis J. Tsotras
2012	—	`conf`	Multithreaded FPGA acceleration of DNA sequence mapping. HPEC Edward Fernandez, Walid A. Najjar, Stefano Lonardi, Jason R. Villarreal
2011	—	`conf`	Efficient XML Path Filtering Using GPUs. ADMS@VLDB Roger Moussalli, Robert J. Halstead, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras
2011	—	`conf`	Exploring irregular memory accesses on FPGAs. IA3@SC Robert J. Halstead, Jason R. Villarreal, Walid A. Najjar
2011	A*	`conf`	Massively parallel XML twig filtering using dynamic programming on FPGAs. ICDE Roger Moussalli, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras
2011	Misc	`conf`	String Matching in Hardware Using the FM-Index. FCCM Edward Fernandez, Walid A. Najjar, Stefano Lonardi
2010	A*	`conf`	Accelerating Dynamic Time Warping Subsequence Search with GPUs and FPGAs. ICDM Doruk Sart, Abdullah Mueen, Walid A. Najjar, Eamonn J. Keogh, Vit Niennattrakul
2010	—	`conf`	Accelerating XML Query Matching through Custom Stack Generation on FPGAs. HiPEAC Roger Moussalli, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras
2010	Misc	`conf`	Designing Modular Hardware Accelerators in C with ROCCC 2.0. FCCM Jason R. Villarreal, Adrian Park, Walid A. Najjar, Robert J. Halstead
2010	B	`conf`	Exploration of Short Reads Genome Mapping in Hardware. FPL Edward Fernandez, Walid A. Najjar, Elena Yavorska Harris, Stefano Lonardi
2010	J	`jnl`	Impact of high-level transformations within the ROCCC framework. ACM Trans. Archit. Code Optim. Betul Buyukkurt, John Cortes, Jason R. Villarreal, Walid A. Najjar
2009	J	`jnl`	Boosting XML Filtering with a Scalable FPGA-based Architecture CoRR Abhishek Mitra, Marcos R. Vieira, Petko Bakalov, Walid A. Najjar, Vassilis J. Tsotras
2009	A	`conf`	Boosting XML filtering through a scalable FPGA-based architecture. CIDR Abhishek Mitra, Marcos R. Vieira, Petko Bakalov, Vassilis J. Tsotras, Walid A. Najjar
2009	J	`jnl`	Energy-efficient encoding techniques for off-chip data buses. ACM Trans. Embed. Comput. Syst. Dinesh C. Suresh, Banit Agrawal, Jun Yang, Walid A. Najjar
2009	—	`ed.`	Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2009), Samos, Greece, July 20-23, 2009 ICSAMOS Walid A. Najjar, Michael J. Schulte
2009	—	`conf`	Reconfigurable Computing in the New Age of Parallelism. SAMOS Walid A. Najjar, Jason R. Villarreal
2009	J	`jnl`	Tunable and Energy Efficient Bus Encoding Techniques. IEEE Trans. Computers Dinesh C. Suresh, Banit Agrawal, Jun Yang, Walid A. Najjar
2008	J	`jnl`	A Compiler Intermediate Representation for Reconfigurable Fabrics. Int. J. Parallel Program. Zhi Guo, Betul Buyukkurt, John Cortes, Abhishek Mitra, Walid A. Najjar
2008	B	`conf`	Compiled hardware acceleration of Molecular Dynamics code. FPL Jason R. Villarreal, Walid A. Najjar
2008	B	`conf`	Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs. FPL Betul Buyukkurt, Walid A. Najjar
2008	J	`jnl`	Efficient hardware code generation for FPGAs. ACM Trans. Archit. Code Optim. Zhi Guo, Walid A. Najjar, Betul Buyukkurt
2008	J	`jnl`	OpenFPGA CoreLib core library interoperability effort. Parallel Comput. Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov
2008	—	`ed.`	Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2008), Samos, Greece, July 21-24, 2008 ICSAMOS Walid A. Najjar, Holger Blume
2007	A	`conf`	A one-shot configurable-cache tuner for improved energy and performance. DATE Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros
2007	—	`conf`	Compiling PCRE to FPGA for accelerating SNORT IDS. ANCS Abhishek Mitra, Walid A. Najjar, Laxmi N. Bhuyan
2007	Misc	`conf`	Compiling code accelerators for FPGAs. CASES Walid A. Najjar
2007	Misc	`conf`	Compiling code accelerators for FPGAs. CODES+ISSS Walid A. Najjar
2007	B	`conf`	Dynamic Partial FPGA Reconfiguration in a Prototype Microprocessor System. FPL Kai Schleupen, Scott Lekuch, Ryan Mannion, Zhi Guo, Walid A. Najjar, Frank Vahid
2007	B	`ed.`	FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007 FPL Koen Bertels, Walid A. Najjar, Arjan J. van Genderen, Stamatis Vassiliadis
2007	J	`jnl`	Optimized Generation of Data-Path from C Codes for FPGAs CoRR Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers
2006	B	`conf`	A Compiler Intermediate Representation for Reconfigurable Fabrics. FPL Zhi Guo, Walid A. Najjar
2006	A	`conf`	A code refinement methodology for performance-improved synthesis from C. ICCAD Greg Stitt, Frank Vahid, Walid A. Najjar
2006	—	`conf`	Automatic Compilation Framework for Bloom Filter Based Intrusion Detection. ARC Dinesh C. Suresh, Zhi Guo, Betul Buyukkurt, Walid A. Najjar
2006	B	`conf`	Automation of IP Core Interface Generation for Reconfigurable Computing. FPL Zhi Guo, Abhishek Mitra, Walid A. Najjar
2006	J	`jnl`	Compile-time area estimation for LUT-based FPGAs. ACM Trans. Design Autom. Electr. Syst. Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi
2006	C	`conf`	Dynamic Co-Processor Architecture for Software Acceleration on CSoCs. ICCD Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A. Najjar
2006	J	`jnl`	Efficient indexing data structures for flash-based sensor devices. ACM Trans. Storage Song Lin, Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar
2006	—	`conf`	Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs. ARC Betul Buyukkurt, Zhi Guo, Walid A. Najjar
2005	J	`jnl`	A highly configurable cache for low energy embedded systems. ACM Trans. Embed. Comput. Syst. Chuanjun Zhang, Frank Vahid, Walid A. Najjar
2005	A	`conf`	A tunable bus encoder for off-chip data buses. ISLPED Dinesh C. Suresh, Banit Agrawal, Jun Yang, Walid A. Najjar
2005	J	`jnl`	A way-halting cache for low-energy high-performance systems. ACM Trans. Archit. Code Optim. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar
2005	—	`conf`	Data Acquisition in Sensor Networks with Large Memories. ICDE Workshops Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar
2005	A	`conf`	MicroHash: An Efficient Index Structure for Flash-Based Sensor Devices. FAST Demetrios Zeinalipour-Yazti, Song Lin, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar
2005	A	`conf`	Optimized Generation of Data-Path from C Codes for FPGAs. DATE Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers
2005	—	`conf`	Power Efficient Instruction Caches for Embedded Systems. SAMOS Dinesh C. Suresh, Walid A. Najjar, Jun Yang
2005	Misc	`ed.`	Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005 CASES Thomas M. Conte, Paolo Faraboschi, William H. Mangione-Smith, Walid A. Najjar
2005	B	`conf`	RISE - Co-S : high performance sensor storage and Co-processing architecture. SECON Anirban Banerjee, Abhishek Mitra, Walid A. Najjar, Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos
2005	Misc	`conf`	Splitting the sensor node. SenSys Anirban Banerjee, Anirban Mitra, Walid A. Najjar
2005	A	`conf`	Techniques for synthesizing binaries to an advanced register/memory structure. FPGA Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
2005	—	`conf`	Towards In-Situ Data Storage in Sensor Databases. Panhellenic Conference on Informatics Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Anirban Mitra, Anirban Banerjee, Walid A. Najjar
2005	C	`conf`	VALVE: Variable Length Value Encoder for Off-Chip Data Buses.. ICCD Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, Jun Yang
2004	—	`conf`	"How Long is Your Belt?" Towards a Single Device for Multiple Functions. ICPS Walid A. Najjar
2004	A	`conf`	A quantitative analysis of the speedup factors of FPGAs over processors. FPGA Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers
2004	A	`conf`	A way-halting cache for low-energy high-performance systems. ISLPED Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar
2004	—	`conf`	From Here to Main-stream: The Present and Future of Reconfigurable Computing. ERSA Walid A. Najjar
2004	B	`conf`	Input data reuse in compiling window operations onto reconfigurable hardware. LCTES Zhi Guo, Betul Buyukkurt, Walid A. Najjar
2003	A*	`conf`	A Highly-Configurable Cache Architecture for Embedded Systems. ISCA Chuanjun Zhang, Frank Vahid, Walid A. Najjar
2003	J	`jnl`	A Way-Halting Cache for Low-Energy High-Performance Systems. IEEE Comput. Archit. Lett. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar
2003	J	`jnl`	Automatic compilation to a coarse-grained reconfigurable system-opn-chip. ACM Trans. Embed. Comput. Syst. Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes
2003	—	`conf`	Energy Benefits of a Configurable Line Size Cache for Embedded Systems. ISVLSI Chuanjun Zhang, Frank Vahid, Walid A. Najjar
2003	Misc	`conf`	FV-MSB: A Scheme for Reducing Transition Activity on Data Buses. HiPC Dinesh C. Suresh, Jun Yang, Chuanjun Zhang, Banit Agrawal, Walid A. Najjar
2003	Misc	`conf`	First results with eBlocks: embedded systems building blocks. CODES+ISSS Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh
2003	J	`jnl`	High-Level Language Abstraction for Reconfigurable Computing. Computer Walid A. Najjar, A. P. Wim Böhm, Bruce A. Draper, Jeffrey Hammes, Robert Rinker, J. Ross Beveridge, Monica Chawathe, Charles Ross
2003	Misc	`conf`	Power efficient encoding techniques for off-chip data buses. CASES Dinesh C. Suresh, Banit Agrawal, Jun Yang, Walid A. Najjar, Laxmi N. Bhuyan
2003	B	`conf`	Profiling tools for hardware/software partitioning of embedded applications. LCTES Dinesh C. Suresh, Walid A. Najjar, Frank Vahid, Jason R. Villarreal, Greg Stitt
2002	Misc	`conf`	Compiling ATR Probing Codes for Execution on FPGA Hardware. FCCM A. P. Wim Böhm, J. Ross Beveridge, Bruce A. Draper, Charlie Ross, Monica Chawathe, Walid A. Najjar
2002	Misc	`conf`	Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems. FCCM Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi
2002	J	`jnl`	Improving Software Performance with Configurable Logic. Des. Autom. Embed. Syst. Jason R. Villarreal, Dinesh C. Suresh, Greg Stitt, Frank Vahid, Walid A. Najjar
2002	J	`jnl`	Mapping a Single Assignment Programming Language to Reconfigurable Systems. J. Supercomput. A. P. Wim Böhm, Jeffrey Hammes, Bruce A. Draper, Monica Chawathe, Charlie Ross, Robert Rinker, Walid A. Najjar
2001	J	`jnl`	A New Adaptive Hardware Tree-Based Multicast Routing in K-Ary N-Cubes. IEEE Trans. Computers Dianne R. Kumar, Walid A. Najjar, Pradip K. Srimani
2001	Misc	`conf`	A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. CASES Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm
2001	J	`jnl`	An automated process for compiling dataflow graphs into reconfigurable hardware. IEEE Trans. Very Large Scale Integr. Syst. Robert Rinker, M. Carter, A. Patel, Monica Chawathe, Charlie Ross, Jeffrey Hammes, Walid A. Najjar, A. P. Wim Böhm
2001	C	`conf`	Compiling SA-C Programs to FPGAs: Performance Results. ICVS Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hammes, Walid A. Najjar, J. Ross Beveridge, Charlie Ross, Monica Chawathe, Mitesh Desai, José Bins
2001	A	`conf`	Loop fusion and temporal common subexpression elimination in window-based loops. IPDPS Jeffrey Hammes, A. P. Wim Böhm, Charlie Ross, Monica Chawathe, Bruce A. Draper, Robert Rinker, Walid A. Najjar
2001	Misc	`conf`	One-Step Compilation of Image Processing Applications to FPGAs. FCCM A. P. Wim Böhm, Bruce A. Draper, Walid A. Najjar, Jeffrey Hammes, Robert Rinker, Monica Chawathe, Charlie Ross
2001	A	`conf`	Performance Evaluation of a New Hardware Supported Multicast Scheme for K-ary N-cubes. IPDPS Dianne R. Kumar, Walid A. Najjar, Pradip K. Srimani
2001	J	`jnl`	Resource Management in Dataflow-Based Multithreaded Execution. J. Parallel Distributed Comput. Lucas Roh, Bhanu Shankar, A. P. Wim Böhm, Walid A. Najjar
2001	—	`conf`	The Sisal Project: Real World Functional Programming. Compiler Optimizations for Scalable Parallel Systems Languages Jean-Luc Gaudiot, Thomas DeBoni, John Feo, A. P. Wim Böhm, Walid A. Najjar, Patrick Miller
2000	Misc	`conf`	A High Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems. PDPTA Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper
2000	—	`conf`	Compiling Image Processing Applications to Reconfigurable Hardware. ASAP Robert Rinker, Jeffrey Hammes, Walid A. Najjar, A. P. Wim Böhm, Bruce A. Draper
2000	—	`conf`	Compiling and Optimizing Image Processing Algorithms for FPGAs. CAMP Bruce A. Draper, Walid A. Najjar, A. P. Wim Böhm, Jeffrey Hammes, Robert Rinker, Charlie Ross, Monica Chawathe, José Bins
1999	J	`jnl`	Advances in the dataflow computational model. Parallel Comput. Walid A. Najjar, Edward A. Lee, Guang R. Gao
1999	—	`conf`	Cameron: High level Language Compilation for Reconfigurable Systems. IEEE PACT Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper, J. Ross Beveridge
1999	—	`conf`	Combining Adaptive and Deterministic Routing: Evaluation of a Hybrid Router. CANPC Dianne R. Kumar, Walid A. Najjar
1997	—	`conf`	Empirical Evaluation of Deterministic and Adaptive Routing with Constant-Area Routers. IEEE PACT Dianne Miller, Walid A. Najjar
1997	J	`jnl`	Foreword to the special issues. Int. J. Parallel Program. Walid A. Najjar, Gabriel M. Silberman
1997	—	`conf`	Preliminary Evaluation of a Hybrid Deterministic/Adaptive Router. PCRCW Dianne Miller, Walid A. Najjar
1996	B	`conf`	Analysis of Buffer Design for Adaptive Routing in Direct Networks. MASCOTS Annette Lagman, Walid A. Najjar
1996	—	`conf`	Comparison of two storage models in data-driven multithreaded architectures. SPDP Murali Annavaram, Walid A. Najjar
1996	J	`jnl`	Generation, Optimization, and Evaluation of Multithreaded Code. J. Parallel Distributed Comput. Lucas Roh, Walid A. Najjar, Bhanu Shankar, A. P. Wim Böhm
1995	B	`conf`	Analysis of communications and overhead reduction in multithreaded execution. PACT Lucas Roh, Walid A. Najjar
1995	B	`conf`	Control of loop parallelism in multithreaded code. PACT Bhanu Shankar, Lucas Roh, A. P. Wim Böhm, Walid A. Najjar
1995	A*	`conf`	Design of storage hierarchy in multithreaded architectures. MICRO Lucas Roh, Walid A. Najjar
1995	J	`jnl`	Exploiting Data Structure Locality in the Dataflow Model. J. Parallel Distributed Comput. William Marcus Miller, Walid A. Najjar, A. P. Wim Böhm
1994	A	`conf`	A model for dataflow based vector execution. International Conference on Supercomputing William Marcus Miller, Walid A. Najjar, A. P. Wim Böhm
1994	J	`jnl`	An Analysis of Edge Fault Tolerance in Recursively Decomposable Regular Networks. IEEE Trans. Computers Annette Lagman, Walid A. Najjar, Pradip K. Srimani
1994	—	`conf`	An Evaluation of Optimized Threaded Code Generation. IFIP PACT Lucas Roh, Walid A. Najjar, Bhanu Shankar, A. P. Wim Böhm
1994	J	`jnl`	An evaluation of medium-grain dataflow code. Int. J. Parallel Program. Walid A. Najjar, Lucas Roh, A. P. Wim Böhm
1994	J	`jnl`	Authors' Reply. IEEE Trans. Computers Walid A. Najjar, Jean-Luc Gaudiot
1994	—	`ch.`	Exploiting Locality in Hybrid Dataflow Programs. Multithreaded Computer Architecture Walid A. Najjar, A. P. Wim Böhm, William Marcus Miller
1994	B	`conf`	Modeling Adaptive Routing in MASCOTS Walid A. Najjar, Annette Lagman, Sumit Sur, Pradip K. Srimani
1993	J	`jnl`	A Quantitative Analysis of Dataflow Program Execution - Preliminaries to a Hybrid Design. J. Parallel Distributed Comput. Walid A. Najjar, A. P. Wim Böhm, William Marcus Miller
1993	A*	`conf`	An evaluation of bottom-up and top-down thread generation techniques. MICRO A. P. Wim Böhm, Walid A. Najjar, Bhanu Shankar, Lucas Roh
1993	J	`jnl`	Conditional Disconnection Probability in Star Graphs. VLSI Design Walid A. Najjar, Pradip K. Srimani
1993	—	`conf`	Evaluation of Idealized Adaptive Routing on k-ary n-cubes. SPDP Annette Lagman, Walid A. Najjar, Sumit Sur, Pradip K. Srimani
1993	—	`conf`	Generation and Quantitative Evaluation of Dataflow Clusters. FPCA Lucas Roh, Walid A. Najjar, A. P. Wim Böhm
1993	—	`conf`	The Initial Performance of a Bottom-Up Clustering Algorithm for Dataflow Graphs. Architectures and Compilation Techniques for Fine and Medium Grain Parallelism Walid A. Najjar, Lucas Roh, A. P. Wim Böhm
1992	A*	`conf`	An Analysis of Loop Latency in Dataflow Execution. ISCA Walid A. Najjar, William Marcus Miller, A. P. Wim Böhm
1991	A*	`conf`	A Quantitative Analysis of Locality in Dataflow Programs. MICRO William Marcus Miller, Walid A. Najjar, A. P. Wim Böhm
1991	—	`conf`	Network resilience of star graphs: a comparative analysis. ACM Conference on Computer Science Walid A. Najjar, Pradip K. Srimani
1990	—	`conf`	A data-driven execution paradigm for distributed fault-tolerance. ACM SIGOPS European Workshop Walid A. Najjar, Jean-Luc Gaudiot
1990	J	`jnl`	Network Resilience: A Measure of Network Fault Tolerance. IEEE Trans. Computers Walid A. Najjar, Jean-Luc Gaudiot
1989	—	`conf`	A Single-Assignment Language in a Distributed Memory Multiprocessor. PARLE (2) Paraskevas Evripidou, Walid A. Najjar, Jean-Luc Gaudiot
1989	B	`conf`	Limits on Scalability in Gracefully Degradable Large-Scale Systems. SRDS Walid A. Najjar, Jean-Luc Gaudiot
1988	A	`conf`	Network Disconnection in Distributed Systems. ICDCS Walid A. Najjar, Jean-Luc Gaudiot
1987	B	`conf`	Multi-Level Execution In Data-Flow Architectures. ICPP Walid A. Najjar, Jean-Luc Gaudiot
1987	J	`jnl`	Parallel Discrete-Event Simulation. IEEE Des. Test Walid A. Najjar, Jean-Luc Jezouin, Jean-Luc Gaudiot
1987	—	`conf`	Reliability and Performance Modelling of Hypercube-Based Mutliprocessors. Computer Performance and Reliability Walid A. Najjar, Jean-Luc Gaudiot