W. Robert Daasch

39 papers A 20C 1Misc 5Journal 9Unranked 4

Year	Rank	Type	Title / Venue / Authors
2016	Misc	`conf`	Consistency in wafer based outlier screening. VTS Sebastian Siatkowski, Chuanhe Jay Shan, Li-C. Wang, Nikolas Sumikawa, W. Robert Daasch, John M. Carulli
2016	A	`conf`	What we know after twelve years developing and deploying test data analytics solutions. ITC Kenneth M. Butler, Amit Nahar, W. Robert Daasch
2015	A	`conf`	Generalization of an outlier model into a "global" perspective. ITC Sebastian Siatkowski, Chia-Ling Chang, Li-C. Wang, Nikolas Sumikawa, LeRoy Winemberg, W. Robert Daasch
2014	A	`conf`	Board manufacturing test correlation to IC manufacturing test. ITC C. Glenn Shirley, W. Robert Daasch, Phil Nigh, Zoe Conroy
2014	J	`jnl`	Copula Models of Correlation: A DRAM Case Study. IEEE Trans. Computers C. Glenn Shirley, W. Robert Daasch
2011	A	`conf`	Die-level adaptive test: Real-time test reordering and elimination. ITC Kapil R. Gotkhindikar, W. Robert Daasch, Kenneth M. Butler, John M. Carulli Jr., Amit Nahar
2009	A	`conf`	Application of non-parametric statistics of the parametric response for defect diagnosis. ITC Rama Gudavalli, W. Robert Daasch, Phil Nigh, Douglas Heaberlin
2009	J	`jnl`	Multidimensional Test Escape Rate Modeling. IEEE Des. Test Comput. Kenneth M. Butler, John M. Carulli Jr., Jayashree Saxena, Amit Nahar, W. Robert Daasch
2009	J	`jnl`	Statistics in Semiconductor Test: Going beyond Yield. IEEE Des. Test Comput. W. Robert Daasch, C. Glenn Shirley, Amit Nahar
2008	—	`conf`	Analyzing the Impact of Fault Tolerant BIST for VLSI Design. DFT Saurabh Jain, W. Robert Daasch, David Armbrust
2007	A	`conf`	Silicon evaluation of longest path avoidance testing for small delay defects. ITC Ritesh P. Turakhia, W. Robert Daasch, Mark Ward, John Van Slyke
2006	J	`jnl`	Changing Test and Data Modeling Requirements for Screening Latent Defects as Statistical Outliers. IEEE Des. Test Comput. Ritesh P. Turakhia, W. Robert Daasch, Joel Lurkins, Brady Benware
2005	A	`conf`	Burn-in reduction using principal component analysis. ITC Amit Nahar, W. Robert Daasch, Suresh Subramaniam
2005	A	`conf`	Data-driven models for statistical testing: measurements, estimates and residuals. ITC W. Robert Daasch, Robert Madge
2005	Misc	`conf`	Defect Screening Using Independent Component Analysis on I_DDQ. VTS Ritesh P. Turakhia, Brady Benware, Robert Madge, Thaddeus T. Shannon, W. Robert Daasch
2005	A	`conf`	The value of statistical testing for quality, yield and test cost improvement. ITC Robert Madge, Brady Benware, Mark Ward, W. Robert Daasch
2005	A	`conf`	Variance reduction and outliers: statistical analysis of semiconductor test data. ITC W. Robert Daasch, Robert Madge
2004	—	`conf`	A radio-frequency CMOS active inductor and its application in designing high-Q filters. ISCAS (4) Haiqiao Xiao, Rolf Schaumann, W. Robert Daasch, Phillip K. Wong, Branimir Pejcinovic
2004	Misc	`conf`	Detection of Temperature Sensitive Defects Using ZTC. VTS Ethan Long, W. Robert Daasch, Robert Madge, Brady Benware
2004	A	`conf`	Dude! Where's my data? - Cracking Open the Hermetically Sealed Tester. ITC W. Robert Daasch, Manu Rehani
2004	A	`conf`	In Search of the Optimum Test Set - Adaptive Test Methods for Maximum Defect Coverage and Lowest Test Cost. ITC Robert Madge, Brady Benware, Ritesh P. Turakhia, W. Robert Daasch, Chris Schuermyer, Jens Ruffler
2004	A	`conf`	Minimum Testing Requirements to Screen Temperature Dependent Defects. ITC Chris Schuermyer, Jens Ruffler, W. Robert Daasch
2003	Misc	`conf`	Effectiveness Comparisons of Outlier Screening Methods for Frequency Dependent Defects on Complex ASICs. VTS Brady Benware, Robert Madge, Cam Lu, W. Robert Daasch
2003	J	`jnl`	Obtaining High Defect Coverage for Frequency-Dependent Defects in Complex ASICs. IEEE Des. Test Comput. Robert Madge, Brady Benware, W. Robert Daasch
2003	A	`conf`	Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ. ITC Chris Schuermyer, Brady Benware, Kevin Cota, Robert Madge, W. Robert Daasch, L. Ning
2002	—	`conf`	A Thermal-Aware Superscalar Microprocessor (invited). ISQED Chee How Lim, W. Robert Daasch, George Cai
2002	A	`conf`	Isolating and Removing Sources of Variation in Test Data. ITC David Turner, David Abercrombie, James McNames, W. Robert Daasch, Robert Madge
2002	J	`jnl`	Leakage and Process Variation Effects in Current Testing on Future CMOS Circuits. IEEE Des. Test Comput. Ali Keshavarzi, James W. Tschanz, Siva G. Narendra, Vivek De, W. Robert Daasch, Kaushik Roy, Manoj Sachdev, Charles F. Hawkins
2002	A	`conf`	Neighbor Selection for Variance Reduction in IDDQ and Other Parametric Data. ITC W. Robert Daasch, Kevin Cota, James McNames, Robert Madge
2002	J	`jnl`	Neighborhood Selection for IDDQ Outlier Screening at Wafer Sort. IEEE Des. Test Comput. W. Robert Daasch, James McNames, Robert Madge, Kevin Cota
2002	A	`conf`	Screening MinVDD Outliers Using Feed-Forward Voltage Testing. ITC Robert Madge, B. H. Goh, V. Rajagopalan, C. Macchietto, W. Robert Daasch, Chris Schuermyer, C. Taylor, David Turner
2002	Misc	`conf`	Statistical Post-Processing at Wafersort - An Alternative to Burn-in and a Manufacturable Solution to Test Limit Setting for Sub-micron Technologies. VTS Robert Madge, Manu Rehani, Kevin Cota, W. Robert Daasch
2001	A	`conf`	Neighbor selection for variance reduction in I_DDQ and other parametric data. ITC W. Robert Daasch, Kevin Cota, James McNames, Robert Madge
2000	—	`conf`	TEM PACS Ashutosh S. Dhodapkar, Chee How Lim, George Cai, W. Robert Daasch
2000	A	`conf`	Variance reduction using wafer patterns in I_ddQ data. ITC W. Robert Daasch, James McNames, Daniel Bockelman, Kevin Cota
1995	J	`jnl`	Accurate Predictions of Parallel Program Execution Time. J. Parallel Distributed Comput. Michael A. Driscoll, W. Robert Daasch
1993	C	`conf`	A 20 MHz Fully-balanced Transconductance-C Filter in 2 µm CMOS Technology. ISCAS Pan Wu, Rolf Schaumann, W. Robert Daasch
1992	J	`jnl`	Automation of the ic layout of continuous-time transconductance-capacitor filters. Int. J. Circuit Theory Appl. W. Robert Daasch, Martine Wedlake, Rolf Schaumann, Pan Wu
1987	A	`conf`	High Speed Interconnection Using the Clos Network. ICS William A. Payne III, Fillia Makedon, W. Robert Daasch