Volkan Kursun - RankMe

115 papers A* 1A 2C 24Journal 42Unranked 46

Year	Rank	Type	Title / Venue / Authors
2022	C	`conf`	Impact of Sheet Width and Silicon Height in 3D Stacked Nanosheet GAA Transistor Technology. ISCAS Anil Kumar Gundu, Volkan Kursun
2021	J	`jnl`	Novel low leakage and energy efficient dual-pullup/dual-pulldown repeater. Integr. Anil Kumar Gundu, Volkan Kursun
2021	—	`conf`	Optimization of 3D Stacked Nanosheets in 5nm Gate-all-around Transistor Technology. SoCC Anil Kumar Gundu, Volkan Kursun
2020	J	`jnl`	Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2019	—	`conf`	Carbon-Based Three-Dimensional SRAM Cell with Minimum Inter-Layer Area Skew Considering Process imperfections. ASICON Jiachen Jiang, Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
2019	J	`jnl`	Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019	—	`conf`	Energy Efficient Clock Distribution with Low-Leakage Multi-Vt Buffers. PATMOS Anil Kumar Gundu, Volkan Kursun
2019	J	`jnl`	Low Leakage Clock Tree With Dual-Threshold- Voltage Split Input-Output Repeaters. IEEE Trans. Very Large Scale Integr. Syst. Anil Kumar Gundu, Volkan Kursun
2019	—	`conf`	Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes. ICEIC Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2017	—	`conf`	Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors. ASICON Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2017	J	`jnl`	Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic. Microelectron. J. Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
2016	J	`jnl`	Low power and robust memory circuits with asymmetrical ground gating. Microelectron. J. Hailong Jiao, Yongmin Qiu, Volkan Kursun
2016	J	`jnl`	Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode. Integr. Hailong Jiao, Yongmin Qiu, Volkan Kursun
2016	C	`conf`	Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode. IOLTS Hailong Jiao, Yongmin Qiu, Volkan Kursun
2016	J	`jnl`	Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability. J. Circuits Syst. Comput. Shairfe Muhammad Salahuddin, Volkan Kursun
2015	C	`conf`	2-Phase high-frequency clock distribution with SPLIT-IO dual-Vt repeaters for suppressed leakage currents. ISCAS Hong Zhu, Volkan Kursun
2015	J	`jnl`	A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors. IEEE Trans. Very Large Scale Integr. Syst. Yanan Sun, Hailong Jiao, Volkan Kursun
2015	C	`conf`	Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed. ISCAS Yanan Sun, Volkan Kursun
2014	J	`jnl`	A Comprehensive Comparison of Data Stability Enhancement Techniques With Novel Nanoscale SRAM Cells Under Parameter Fluctuations. IEEE Trans. Circuits Syst. I Regul. Pap. Hong Zhu, Volkan Kursun
2014	C	`conf`	A comprehensive comparison of superior triple-threshold-voltage 7-transistor, 8-transistor, and 9-transistor SRAM cells. ISCAS Hong Zhu, Volkan Kursun
2014	J	`jnl`	Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Volkan Kursun
2014	—	`conf`	High-speed and low-leakage FinFET SRAM cell with enhanced read and write voltage margins. ISIC Shairfe Muhammad Salahuddin, Volkan Kursun
2014	—	`conf`	Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins. ICM Yanan Sun, Hailong Jiao, Volkan Kursun
2014	J	`jnl`	Mode transition timing and energy overhead analysis in noise-aware MTCMOS circuits. Microelectron. J. Hailong Jiao, Volkan Kursun
2014	J	`jnl`	Novel Low-Leakage and High-Speed Triple-Threshold-Voltage Buffers With Skewed Inputs and Outputs. IEEE Trans. Circuits Syst. I Regul. Pap. Hong Zhu, Volkan Kursun
2014	—	`conf`	Triple-threshold-voltage 9-transistor SRAM cell for data stability and energy-efficiency at ultra-low power supply voltages. ICM Hong Zhu, Volkan Kursun
2013	—	`conf`	A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability. ISQED Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
2013	—	`conf`	Characterization of a low leakage current and high-speed 7T SRAM circuit with wide voltage margins. ISVLSI Khawar Sarfraz, Volkan Kursun
2013	C	`conf`	Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits. VLSI-SoC Hailong Jiao, Volkan Kursun
2013	—	`conf`	Ground gated 8T SRAM cells with enhanced read and hold data stability. ISVLSI Hailong Jiao, Volkan Kursun
2013	—	`conf`	Impact of process parameter and supply voltage fluctuations on multi-threshold-voltage seven-transistor static memory cells. ISQED Hong Zhu, Volkan Kursun
2013	C	`conf`	Low-leakage hybrid FinFET SRAM cell with asymmetrical gate overlap / underlap bitline access transistors for enhanced read data stability. ISCAS Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
2013	C	`conf`	Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors. ISCAS Yanan Sun, Volkan Kursun
2013	C	`conf`	Novel dual-threshold-voltage energy-efficient buffers for driving large extrinsic load capacitance. ISCAS Hong Zhu, Volkan Kursun
2013	J	`jnl`	Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. Hailong Jiao, Volkan Kursun
2013	—	`conf`	Underlap engineered eight-transistor SRAM cell for stronger data stability enhanced write ability and suppressed leakage power consumption. ICECS Shairfe Muhammad Salahuddin, Volkan Kursun
2012	C	`conf`	Full-custom design of low leakage data preserving ground gated 6T SRAM cells to facilitate single-ended write operations. ISCAS Hailong Jiao, Volkan Kursun
2012	—	`conf`	Multi-phase sleep signal modulation for mode transition noise mitigation in MTCMOS circuits. ISOCC Hailong Jiao, Volkan Kursun
2012	—	`conf`	NP dynamic CMOS resurrection with carbon nanotube field effect transistors. ISOCC Yanan Sun, Volkan Kursun
2012	J	`jnl`	Threshold Voltage Tuning for Faster Activation With Lower Noise in Tri-Mode MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. Hailong Jiao, Volkan Kursun
2011	J	`jnl`	Ground Bouncing Noise Suppression Techniques for Data Preserving Sequential MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. Hailong Jiao, Volkan Kursun
2011	C	`conf`	Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. ISCAS Yanan Sun, Volkan Kursun
2011	J	`jnl`	Multi-Threshold Voltage FinFET Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. Sherif A. Tawfik, Volkan Kursun
2011	J	`jnl`	Noise-Aware Data Preserving Sequential MTCMOS Circuits with Dynamic Forward Body Bias. J. Circuits Syst. Comput. Hailong Jiao, Volkan Kursun
2011	—	`conf`	Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits. SoCC Hailong Jiao, Volkan Kursun
2011	—	`conf`	Symmetrical triple-threshold-voltage nine-transistor SRAM circuit with superior noise immunity and overall electrical quality. ISOCC Hong Zhu, Volkan Kursun
2011	C	`conf`	Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs. VLSI-SoC Yanan Sun, Volkan Kursun
2010	J	`jnl`	Dual Supply Voltages and Dual Clock Frequencies for Lower Clock Power and Suppressed Temperature-Gradient-Induced Clock Skew. IEEE Trans. Very Large Scale Integr. Syst. Sherif A. Tawfik, Volkan Kursun
2010	J	`jnl`	Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Hailong Jiao, Volkan Kursun
2010	J	`jnl`	Low-Leakage and Compact Registers with Easy-Sleep Mode. J. Low Power Electron. Hailong Jiao, Volkan Kursun
2010	C	`conf`	Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits. VLSI-SoC Hailong Jiao, Volkan Kursun
2010	C	`conf`	Smooth awakenings: Reactivation noise suppressed low-leakage and robust MTCMOS flip-flops. ISCAS Hailong Jiao, Volkan Kursun
2010	—	`conf`	Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits. VLSI-SoC (Selected Papers) Hailong Jiao, Volkan Kursun
2009	J	`jnl`	FinFET domino logic with independent gate keepers. Microelectron. J. Sherif A. Tawfik, Volkan Kursun
2009	J	`jnl`	Low Power and High Speed Multi Threshold Voltage Interface Circuits. IEEE Trans. Very Large Scale Integr. Syst. Sherif A. Tawfik, Volkan Kursun
2009	J	`jnl`	Robust FinFET Memory Circuits with P-Type Data Access Transistors for Higher Integration Density and Reduced Leakage Power. J. Low Power Electron. Sherif A. Tawfik, Volkan Kursun
2009	J	`jnl`	Temperature-adaptive voltage scaling for enhanced energy efficiency in subthreshold memory arrays. Microelectron. J. Ranjith Kumar, Volkan Kursun
2008	—	`conf`	Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic. APCCAS Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations. ISQED Sherif A. Tawfik, Volkan Kursun
2008	J	`jnl`	Characterization of a Novel Nine-Transistor SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. Zhiyu Liu, Volkan Kursun
2008	J	`jnl`	Clock Distribution Networks with Gradual Signal Transition Time Relaxation for Reduced Power Consumption. J. Circuits Syst. Comput. Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Compact FinFET Memory Circuits with P-Type Data Access Transistors for Low Leakage and Robust Operation. ISQED Sherif A. Tawfik, Volkan Kursun
2008	C	`conf`	Dynamic wordline voltage swing for low leakage and stable static memory banks. ISCAS Sherif A. Tawfik, Volkan Kursun
2008	C	`conf`	Low power and robust 7T dual-Vt SRAM circuit. ISCAS Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Multi-Vth FinFET sequential circuits with independent-gate bias and work-function engineering for reduced power consumption. APCCAS Sherif A. Tawfik, Volkan Kursun
2008	—	`conf`	Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. ISQED Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun
2008	J	`jnl`	Technique for Accurate Power and Energy Measurement with the Computer-Aided Design Tools. J. Circuits Syst. Comput. Ranjith Kumar, Zhiyu Liu, Volkan Kursun
2008	J	`jnl`	Temperature-Adaptive Energy Reduction Techniques for Nano-CMOS Circuits Displaying Reversed temperature Dependence. J. Circuits Syst. Comput. Ranjith Kumar, Volkan Kursun
2008	J	`jnl`	Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits. Microelectron. J. Ranjith Kumar, Volkan Kursun
2008	C	`conf`	Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits. ISCAS Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	An independent-gate FinFET SRAM cell for high data stability and enhanced integration density. SoCC Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption. ICECS Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS. ISQED Zhiyu Liu, Volkan Kursun
2007	C	`conf`	Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions. ISCAS Zhiyu Liu, Volkan Kursun
2007	A	`conf`	Dual signal frequencies and voltage levels for low power and temperature-gradient tolerant clock distribution. ISLPED Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew. ISQED Sherif A. Tawfik, Volkan Kursun
2007	C	`conf`	High Read Stability and Low Leakage Cache Memory Cell. ISCAS Zhiyu Liu, Volkan Kursun
2007	C	`conf`	Leakage-Aware Design of Nanometer SoC. ISCAS Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu
2007	—	`conf`	Low Power and Stable FinFET SRAM with Static Independent Gate Bias for Enhanced Integration Density. ICECS Sherif A. Tawfik, Volkan Kursun
2007	C	`conf`	Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew. ISCAS Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	Low-power high-performance FinFET sequential circuits. SoCC Sherif A. Tawfik, Volkan Kursun
2007	C	`conf`	Multi-Vth Level Conversion Circuits for Multi-VDD Systems. ISCAS Sherif A. Tawfik, Volkan Kursun
2007	—	`conf`	New MTCMOS Flip-Flops with Simple Control Circuitry and Low Leakage Data Retention Capability. ICECS Zhiyu Liu, Volkan Kursun
2007	J	`jnl`	PMOS-Only Sleep Switch Dual-Threshold Voltage Domino Logic in Sub-65-nm CMOS Technologies. IEEE Trans. Very Large Scale Integr. Syst. Zhiyu Liu, Volkan Kursun
2007	—	`conf`	Temperature-Adaptive Energy Reduction for Ultra-Low Power-Supply-Voltage Subthreshold Logic Circuits. ICECS Ranjith Kumar, Volkan Kursun
2007	J	`jnl`	Voltage optimization for simultaneous energy efficiency and temperature variation resilience in CMOS circuits. Microelectron. J. Ranjith Kumar, Volkan Kursun
2006	—	`conf`	A design methodology for temperature variation insensitive low power circuits. ACM Great Lakes Symposium on VLSI Ranjith Kumar, Volkan Kursun
2006	—	`conf`	High Read Stability and Low Leakage SRAM Cell Based on Data/Bitline Decoupling. SoCC Zhiyu Liu, Volkan Kursun
2006	—	`conf`	High Speed Low Swing Dynamic Circuits with Multiple Supply and Threshold Voltages. ISVLSI Zhiyu Liu, Volkan Kursun
2006	C	`conf`	Impact of temperature fluctuations on circuit characteristics in 180nm and 65nm CMOS technologies. ISCAS Ranjith Kumar, Volkan Kursun
2006	—	`conf`	Leakage Biased Sleep Switch Domino Logic. ISQED Zhiyu Liu, Volkan Kursun
2006	J	`jnl`	Leakage Biased pMOS Sleep Switch Dynamic Circuits. IEEE Trans. Circuits Syst. II Express Briefs Zhiyu Liu, Volkan Kursun
2006	J	`jnl`	Leakage Power Characteristics of Dynamic Circuits in Nanometer CMOS Technologies. IEEE Trans. Circuits Syst. II Express Briefs Zhiyu Liu, Volkan Kursun
2006	—	`conf`	Leakage current starved domino logic. ACM Great Lakes Symposium on VLSI Zhiyu Liu, Volkan Kursun
2006	J	`jnl`	Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits. IEEE Trans. Circuits Syst. II Express Briefs Ranjith Kumar, Volkan Kursun
2006	—	`conf`	Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages. ISQED Zhiyu Liu, Volkan Kursun
2006	J	`jnl`	Sleep switch dual threshold voltage domino logic with reduced subthreshold and gate oxide leakage current. Microelectron. J. Zhiyu Liu, Volkan Kursun
2006	—	`conf`	Supply and Threshold Voltage Optimization for Temperature Variation Insensitive Circuit Performance: A Comparison. SoCC Ranjith Kumar, Volkan Kursun
2006	C	`conf`	Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies. ISCAS Volkan Kursun, Zhiyu Liu
2005	—	`conf`	Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra
2005	J	`jnl`	Monolithic voltage conversion in low-voltage CMOS technologies. Microelectron. J. Volkan Kursun, Vivek De, Eby G. Friedman, Siva G. Narendra
2005	—	`conf`	Shifted Leakage Power Characteristics of Dynamic Circuits Due to Gate Oxide Tunneling. SoCC Zhiyu Liu, Volkan Kursun
2004	—	`conf`	Energy efficient dual threshold voltage dynamic circuits employing sleep switches to minimize subthreshold leakage. ISCAS (2) Volkan Kursun, Eby G. Friedman
2004	A	`conf`	Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De
2004	—	`conf`	Forward body biased keeper for enhanced noise immunity in domino logic circuits. ISCAS (2) Volkan Kursun, Eby G. Friedman
2004	—	`conf`	High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process. ISQED Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman
2004	J	`jnl`	Low-voltage-swing monolithic dc-dc conversion. IEEE Trans. Circuits Syst. II Express Briefs Volkan Kursun, Siva G. Narendra, Vivek K. De, Eby G. Friedman
2004	—	`conf`	Node Voltage Dependent Subthreshold Leakage Current Characteristics of Dynamic Circuits. ISQED Volkan Kursun, Eby G. Friedman
2004	J	`jnl`	Sleep switch dual threshold Voltage domino logic with reduced standby leakage current. IEEE Trans. Very Large Scale Integr. Syst. Volkan Kursun, Eby G. Friedman
2003	J	`jnl`	Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor. IEEE Trans. Very Large Scale Integr. Syst. Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman
2003	J	`jnl`	Domino logic with variable threshold voltage keeper. IEEE Trans. Very Large Scale Integr. Syst. Volkan Kursun, Eby G. Friedman
2003	J	`jnl`	Dynamically Tuning Processor Resources with Adaptive Processing. Computer David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster
2003	—	`conf`	Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization. ISQED Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman
2002	—	`conf`	Low swing dual threshold voltage domino logic. ACM Great Lakes Symposium on VLSI Volkan Kursun, Eby G. Friedman
2002	A*	`conf`	Managing static leakage energy in microprocessor functional units. MICRO Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman