Vojin Zivojnovic

17 papers A* 3A 1C 1Misc 5Journal 3Unranked 3
YearRankTypeTitle / Venue / Authors
2017 A conf
Formal model for system-level power management design.
DATE
Mirela Simonovic, Vojin Zivojnovic, Lazar Saranovac
1999 A* conf
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification.
DAC
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schläger, Bassam Tabbara, Vojin Zivojnovic
1999 A* conf
LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures.
DAC
Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr
1998 — —
Der quantitative Ansatz zum gleichzeitigen Entwurf der DSP Architektur und des Compilers.
Vojin Zivojnovic
1998 J jnl
Minimum Fisher information of moment-constrained distributions with application to robust blind identification.
Signal Process.
Vojin Zivojnovic
1997 Misc conf
An upper bound of the throughput of multirate multiprocessor schedules.
ICASSP
Rainer Schoenen, Vojin Zivojnovic, Heinrich Meyr
1997 J jnl
Compiled Simulation of Programmable DSP Architectures.
J. VLSI Signal Process.
Vojin Zivojnovic, Steven W. K. Tjiang, Heinrich Meyr
1997 Misc conf
Minimum Fisher information spectral analysis.
ICASSP
Vojin Zivojnovic, Dominikus Noll
1997 Misc conf
Modulo-addressing utilization in automatic software synthesis for digital signal processors.
ICASSP
Markus Willems, Holger Keding, Vojin Zivojnovic, Heinrich Meyr
1997 — conf
On core and more: a design perspective for systems-on-a-chip.
ASAP
Stefan Pees, Martin Vaupel, Vojin Zivojnovic, Heinrich Meyr
1996 A* conf
Compiled HW/SW Co-Simulation.
DAC
Vojin Zivojnovic, Heinrich Meyr
1996 — conf
DSP Processor/Compiler Co-Design: A Quantitative Approach.
ISSS
Vojin Zivojnovic, Stefan Pees, C. Schälger, Markus Willems, Rainer Schoenen, Heinrich Meyr
1996 Misc conf
Hierarchization of a priori defined dataflow subgraphs.
ICASSP
Markus Willems, Vojin Zivojnovic, Sebastian Ritz
1996 Misc conf
On retiming of multirate DSP algorithms.
ICASSP
Vojin Zivojnovic, Rainer Schoenen
1994 — conf
Retiming of DSP programs for optimum vectorization.
ICASSP (2)
Vojin Zivojnovic, Sebastian Ritz, Heinrich Meyr
1993 C conf
Design of optimum interpolation filters for digital demodulators.
ISCAS
Vojin Zivojnovic, Heinrich Meyr
1993 J jnl
High-Level Software Synthesis for the Design of Communication Systems.
IEEE J. Sel. Areas Commun.
Sebastian Ritz, Matthias Pankert, Vojin Zivojnovic, Heinrich Meyr