Vladimir Zolotov

86 papers A* 20A 26Misc 1Journal 19Unranked 19

Year	Rank	Type	Title / Venue / Authors
2021	—	`conf`	CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks. NeurIPS Datasets and Benchmarks Ruchir Puri, David S. Kung, Geert Janssen, Wei Zhang, Giacomo Domeniconi, Vladimir Zolotov, Julian Dolby, Jie Chen, Mihir R. Choudhury, Lindsey Decker, Veronika Thost, Luca Buratti, Saurabh Pujar, Shyam Ramji, Ulrich Finkler, Susan Malaika, Frederick Reiss
2021	J	`jnl`	Project CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks. CoRR Ruchir Puri, David S. Kung, Geert Janssen, Wei Zhang, Giacomo Domeniconi, Vladimir Zolotov, Julian Dolby, Jie Chen, Mihir R. Choudhury, Lindsey Decker, Veronika Thost, Luca Buratti, Saurabh Pujar, Ulrich Finkler
2019	—	`conf`	Large Data Flow Graphs in Limited GPU Memory. IEEE BigData Geert Janssen, Vladimir Zolotov, Tung D. Le
2017	J	`jnl`	Analysis and Optimization of fastText Linear Text Classifier. CoRR Vladimir Zolotov, David Kung
2016	A	`conf`	Generation and use of statistical timing macro-models considering slew and load variability. ICCAD Debjit Sinha, Vladimir Zolotov, Jin Hu, Sheshashayee K. Raghunathan, Adil Bhanji, Christine M. Casey
2016	A*	`conf`	Practical statistical static timing analysis with current source models. DAC Debjit Sinha, Vladimir Zolotov, Sheshashayee K. Raghunathan, Michael H. Wood, Kerim Kalafala
2016	Misc	`conf`	Sharing and Re-use of Statistical Timing Macro-Models across Multiple Voltage Domains. VLSID Debjit Sinha, Vladimir Zolotov, Eric Fluhr, Michael H. Wood, Jeffrey Ritzinger, Natesan Venkateswaran, Stephen Shuma
2015	A*	`conf`	Variation aware cross-talk aggressor alignment by mixed integer linear programming. DAC Vladimir Zolotov, Peter Feldmann
2013	J	`jnl`	Order statistics for correlated random variables and its application to at-speed testing. ACM Trans. Design Autom. Electr. Syst. Yiyu Shi, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
2012	J	`jnl`	Path Criticality Computation in Parameterized Statistical Timing Analysis Using a Novel Operator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
2012	A*	`conf`	Reversible statistical DAC Debjit Sinha, Chandu Visweswariah, Natesan Venkateswaran, Jinjun Xiong, Vladimir Zolotov
2012	J	`jnl`	Testability-Driven Statistical Path Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
2012	A*	`conf`	Timing analysis with nonseparable statistical and deterministic variations. DAC Vladimir Zolotov, Debjit Sinha, Jeffrey G. Hemmett, Eric A. Foreman, Chandu Visweswariah, Jinjun Xiong, Jeremy Leitzen, Natesan Venkateswaran
2011	A	`conf`	Optimal statistical chip disposition. ICCAD Vladimir Zolotov, Jinjun Xiong
2011	—	`conf`	Path criticality computation in parameterized statistical timing analysis. ASP-DAC Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
2011	A*	`conf`	Testability driven statistical path selection. DAC Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
2010	J	`jnl`	Statistical Path Selection for At-Speed Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah
2010	A*	`conf`	Transistor sizing of custom high-performance digital circuits with parametric yield considerations. DAC Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu
2009	J	`jnl`	Optimal Test Margin Computation for At-Speed Structural Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz
2009	A	`conf`	Pre-ATPG path selection for near optimal post-ATPG process space coverage. ICCAD Jiniun Xionq, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah
2009	J	`jnl`	Statistical Power Analysis for High-Performance Processors. J. Low Power Electron. Howard Chen, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
2009	A*	`conf`	Statistical multilayer process space coverage for at-speed test. DAC Jinjun Xiong, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah
2009	A*	`conf`	Statistical ordering of correlated timing quantities and its application for path ranking. DAC Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov
2009	A	`conf`	Voltage binning under process variation. ICCAD Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong
2008	—	`ch.`	Coupling Noise. Handbook of Algorithms for Physical Design Automation Rajendran Panda, Vladimir Zolotov, Murat R. Becer
2008	A	`conf`	Incremental Criticality and Yield Gradients. DATE Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
2008	A	`conf`	Optimal Margin Computation for At-Speed Test. DATE Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz
2008	—	`conf`	Static timing: Back to our roots. ASP-DAC Ruiming Chen, Lizheng Zhang, Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong
2008	—	`conf`	Statistical Modeling and Analysis of Static Leakage and Dynamic Switching Power. PATMOS Howard Chen, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
2008	A	`conf`	Statistical path selection for at-speed test. ICCAD Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah
2007	A	`conf`	Compact modeling of variational waveforms. ICCAD Vladimir Zolotov, Jinjun Xiong, Soroush Abbaspour, David J. Hathaway, Chandu Visweswariah
2007	J	`jnl`	Robust Extraction of Spatial Correlation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jinjun Xiong, Vladimir Zolotov, Lei He
2007	A	`conf`	Variation-aware performance verification using at-speed structural test and statistical timing. ICCAD Vikram Iyengar, Jinjun Xiong, Subbayyan Venkatesan, Vladimir Zolotov, David E. Lackey, Peter A. Habitz, Chandu Visweswariah
2006	A*	`conf`	Criticality computation in parameterized statistical timing. DAC Jinjun Xiong, Vladimir Zolotov, Natesan Venkateswaran, Chandu Visweswariah
2006	J	`jnl`	Impact of stress-induced backflow on full-chip electromigration risk assessment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haldun Haznedar, Martin Gall, Vladimir Zolotov, Pon Sung Ku, Chanhee Oh, Rajendran Panda
2006	J	`jnl`	Optimal placement of power-supply pads and pins. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2006	—	`conf`	Robust extraction of spatial correlation. ISPD Jinjun Xiong, Vladimir Zolotov, Lei He
2005	A	`conf`	Accurate delay computation for noisy waveform shapes. ICCAD Amit Jain, David T. Blaauw, Vladimir Zolotov
2005	A*	`conf`	Circuit optimization using statistical static timing analysis. DAC Aseem Agarwal, Kaviraj Chopra, David T. Blaauw, Vladimir Zolotov
2005	A	`conf`	Discrete Vt assignment and gate sizing using a self-snapping continuous formulation. ICCAD Saumil Shah, Ashish Srivastava, Dushyant Sharma, Dennis Sylvester, David T. Blaauw, Vladimir Zolotov
2005	A	`conf`	Gate sizing using incremental parameterized statistical timing analysis. ICCAD Matthew R. Guthaus, Natesan Venkateswaran, Chandu Visweswariah, Vladimir Zolotov
2005	—	`conf`	Optimization objectives and models of variation for statistical gate sizing. ACM Great Lakes Symposium on VLSI Matthew R. Guthaus, Natesan Venkateswaran, Vladimir Zolotov, Dennis Sylvester, Richard B. Brown
2005	A*	`conf`	Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions. DAC Hongliang Chang, Vladimir Zolotov, Sambasivan Narayan, Chandu Visweswariah
2005	A	`conf`	Pessimism reduction in crosstalk noise aware STA. ICCAD Murat R. Becer, Vladimir Zolotov, Rajendran Panda, Amir Grinshpon, Ilan Algor, Rafi Levy, Chanhee Oh
2004	—	`conf`	A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification. ISQED Chanhee Oh, Haldun Haznedar, Martin Gall, Amir Grinshpon, Vladimir Zolotov, Pon Sung Ku, Rajendran Panda
2004	A*	`conf`	A stochastic approach To power grid analysis. DAC Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2004	A	`conf`	Delay noise pessimism reduction by logic correlations. ICCAD Alexey Glebov, Sergey Gavrilov, R. Soloviev, Vladimir Zolotov, Murat R. Becer, Chanhee Oh, Rajendran Panda
2004	A	`conf`	False-Noise Analysis for Domino Circuits. DATE Alexey Glebov, Sergey Gavrilov, Vladimir Zolotov, Chanhee Oh, Rajendran Panda, Murat R. Becer
2004	A*	`conf`	Optimal placement of power supply pads and pins. DAC Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2004	J	`jnl`	Postroute gate sizing for crosstalk noise reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj
2004	A*	`conf`	Static timing analysis using backward signal propagation. DAC Dongwoo Lee, Vladimir Zolotov, David T. Blaauw
2004	J	`jnl`	Statistical clock skew analysis considering intradie-process variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aseem Agarwal, Vladimir Zolotov, David T. Blaauw
2003	A*	`conf`	Computation and Refinement of Statistical Bounds on Circuit Delay. DAC Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
2003	J	`jnl`	Fast on-chip inductance simulation using a precorrected-FFT method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
2003	—	`conf`	Post-Route Gate Sizing for Crosstalk Noise Reduction. ISQED Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj
2003	A*	`conf`	Post-route gate sizing for crosstalk noise reduction. DAC Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj
2003	A	`conf`	SOI Transistor Model for Fast Transient Simulation. ICCAD D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel
2003	—	`conf`	Static Electromigration Analysis for Signal Interconnects. ISQED Chanhee Oh, David T. Blaauw, Murat R. Becer, Vladimir Zolotov, Rajendran Panda, Aurobindo Dasgupta
2003	J	`jnl`	Static electromigration analysis for on-chip signal interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David T. Blaauw, Chanhee Oh, Vladimir Zolotov, Aurobindo Dasgupta
2003	A	`conf`	Statistical Clock Skew Analysis Considering Intra-Die Process Variations. ICCAD Aseem Agarwal, David T. Blaauw, Vladimir Zolotov
2003	A	`conf`	Statistical Timing Analysis Using Bounds. DATE Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
2003	A	`conf`	Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations. ICCAD Aseem Agarwal, David T. Blaauw, Vladimir Zolotov
2003	—	`conf`	Statistical delay computation considering spatial correlations. ASP-DAC Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Min Zhao, Kaushik Gala, Rajendran Panda
2003	J	`jnl`	Statistical timing analysis using bounds and selective enumeration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aseem Agarwal, Vladimir Zolotov, David T. Blaauw
2003	—	`conf`	Table look-up based compact modeling for on-chip interconnect timing and noise analysis. ISCAS (4) Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
2003	A	`conf`	Vectorless Analysis of Supply Noise Induced Delay Variation. ICCAD Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2002	A	`conf`	A precorrected-FFT method for simulating on-chip inductance. ICCAD Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
2002	A	`conf`	Analysis of Noise Avoidance Techniques in DSM Interconnects Using a Complete Crosstalk Noise Model . DATE Murat R. Becer, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Ibrahim N. Hajj
2002	—	`conf`	False-Noise Analysis Using Resolution Method. ISQED Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov, Rajendran Panda, Chanhee Oh
2002	J	`jnl`	False-noise analysis using logic implications. ACM Trans. Design Autom. Electr. Syst. Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov
2002	J	`jnl`	Inductance model and analysis methodology for high-speed on-chip interconnect. IEEE Trans. Very Large Scale Integr. Syst. Kaushik Gala, David T. Blaauw, Vladimir Zolotov, Pravin M. Vaidya, Anil Joshi
2002	—	`conf`	Noise Injection and Propagation in High Performance Designs. ISQED Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Chanhee Oh
2002	A	`conf`	Noise propagation and failure criteria for VLSI designs. ICCAD Vladimir Zolotov, David T. Blaauw, Supamas Sirichotiyakul, Murat R. Becer, Chanhee Oh, Rajendran Panda, Amir Grinshpon, Rafi Levy
2002	J	`jnl`	Slope propagation in static timing analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran
2002	—	`conf`	Statistical timing analysis using bounds and selective enumeration. Timing Issues in the Specification and Synthesis of Digital Systems Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
2002	—	`conf`	Statistical timing analysis using bounds and selective enumeration. Timing Issues in the Specification and Synthesis of Digital Systems Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
2002	—	`conf`	Worst case clock skew under power supply variations. Timing Issues in the Specification and Synthesis of Digital Systems Min Zhao, Kaushik Gala, Vladimir Zolotov, Yuhong Fu, Rajendran Panda, R. Ramkumar, Bhuwan K. Agrawal
2001	—	`conf`	A Global Driver Sizing Tool for Functional Crosstalk Noise Avoidance. ISQED Murat R. Becer, David T. Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov, Jingyan Zuo, Rafi Levy, Ibrahim N. Hajj
2001	A*	`conf`	Driver Modeling and Alignment for Worst-Case Delay Noise. DAC Supamas Sirichotiyakul, David T. Blaauw, Chanhee Oh, Rafi Levy, Vladimir Zolotov, Jingyan Zuo
2001	A	`conf`	False-Noise Analysis using Logic Implications. ICCAD Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov
2001	A*	`conf`	Inductance 101: Analysis and Design Issues. DAC Kaushik Gala, David T. Blaauw, Junfeng Wang, Vladimir Zolotov, Min Zhao
2000	A*	`conf`	ClariNet: a noise analysis tool for deep submicron design. DAC Rafi Levy, David T. Blaauw, Gabi Braca, Aurobindo Dasgupta, Amir Grinshpon, Chanhee Oh, Boaz Orshav, Supamas Sirichotiyakul, Vladimir Zolotov
2000	A	`conf`	Model and analysis for combined package and on-chip power grid simulation. ISLPED Rajendran Panda, David T. Blaauw, Rajat Chaudhry, Vladimir Zolotov, Brian Young, Ravi Ramaraju
2000	A*	`conf`	On-chip inductance modeling and analysis. DAC Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Brian Young, Junfeng Wang, David T. Blaauw
2000	—	`conf`	On-chip inductance modeling. ACM Great Lakes Symposium on VLSI David T. Blaauw, Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Junfeng Wang
2000	A	`conf`	Slope Propagation in Static Timing Analysis. ICCAD David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Chanhee Oh, Rajendran Panda