Vladimir Rybalkin

22 papers A 2B 4C 1Journal 10Unranked 4
YearRankTypeTitle / Venue / Authors
2025 — conf
Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices.
SOCC
Dominik Marek Loroch, Johannes Feldmann, Vladimir Rybalkin, Norbert Wehn
2025 J jnl
Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices.
CoRR
Dominik Marek Loroch, Johannes Feldmann, Vladimir Rybalkin, Norbert Wehn
2025 J jnl
eFAirWrite: Bringing energy efficient text entry to next generation smart devices.
Expert Syst. Appl.
Muhammad Mohsin Ghaffar, Ahmad Abdullah, Junaid Younas, Vladimir Rybalkin, Jonas Ney, Paul Lukowicz, Norbert Wehn
2022 — —
Efficient hardware accleration of recurrent neural networks = Effiziente Hardwarebeschleunigung rekurrenter neuronaler Netze.
Vladimir Rybalkin
2022 J jnl
When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network.
ACM Trans. Reconfigurable Technol. Syst.
Vladimir Rybalkin, Jonas Ney, Menbere Kina Tekleyohannes, Norbert Wehn
2021 J jnl
Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks.
J. Signal Process. Syst.
Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
2021 — conf
Embedded Face Recognition for Personalized Services in the Assistive Robotics.
PKDD/ECML Workshops (1)
Iris Walter, Jonas Ney, Tim Hotfilter, Vladimir Rybalkin, Julian Höfer, Norbert Wehn, Jürgen Becker
2021 B conf
HALF: Holistic Auto Machine Learning for FPGAs.
FPL
Jonas Ney, Dominik Marek Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn
2021 J jnl
HALF: Holistic Auto Machine Learning for FPGAs.
CoRR
Jonas Ney, Dominik Marek Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn
2021 J jnl
iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing.
J. Imaging
Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Javier Alejandro Varela, Norbert Wehn, Andreas Dengel
2021 J jnl
iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing.
Int. J. Parallel Program.
Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Javier Alejandro Varela, Norbert Wehn, Andreas Dengel
2020 J jnl
Efficient Hardware Architectures for 1D- and MD-LSTM Networks.
J. Signal Process. Syst.
Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
2020 J jnl
Real-Time Energy Efficient Hand Pose Estimation: A Case Study.
Sensors
Mhd Rashed Al Koutayni, Vladimir Rybalkin, Jameel Malik, Ahmed Elhayek, Christian Weis, Gerd Reis, Norbert Wehn, Didier Stricker
2020 A conf
When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network.
FPGA
Vladimir Rybalkin, Norbert Wehn
2019 C conf
An In-DRAM Neural Network Processing Engine.
ISCAS
Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
2019 — conf
iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction.
ReConFig
Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Norbert Wehn, Andreas Dengel
2018 B conf
FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs.
FPL
Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott
2018 J jnl
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs.
CoRR
Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott
2018 B conf
iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization.
DocEng
Vladimir Rybalkin, Syed Saqib Bukhari, Muhammad Mohsin Ghaffar, Aqib Ghafoor, Norbert Wehn, Andreas Dengel
2017 A conf
Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition.
DATE
Vladimir Rybalkin, Norbert Wehn, Mohammad Reza Yousefi, Didier Stricker
2016 — conf
A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256).
VTC Spring
Vladimir Rybalkin, Philipp Schläfer, Norbert Wehn
2015 B conf
A new architecture for high throughput, low latency NB-LDPC check node processing.
PIMRC
Philipp Schläfer, Vladimir Rybalkin, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon