Vishal Sharma

12 papers C 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2025 J jnl
FlexDCIM: A 400 MHz 249.1 TOPS/W 64 Kb Flexible Digital Compute-in-Memory SRAM Macro for CNN Acceleration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Vishal Sharma, Xin Zhang, Narendra Singh Dhakad, Tony Tae-Hyoung Kim
2024 J jnl
A 1-Mb RRAM Macro With 9.8 ns Read Access Time Utilizing Dynamic Reference Voltage for Reliable Sensing Operation.
IEEE Trans. Circuits Syst. II Express Briefs
Junjie Mu, Lu Lu, Ju Eon Kim, Byung-Kwon An, Vishal Sharma, Arya Jagath Lekshmi, Putu Andhita Dananjaya, Weng Hong Lai, Wen Siang Lew, Tony Tae-Hyoung Kim
2024 J jnl
In-Memory Computing with 6T SRAM for Multi-operator Logic Design.
Circuits Syst. Signal Process.
Narendra Singh Dhakad, Eshika Chittora, Gopal Raut, Vishal Sharma, Santosh Kumar Vishvakarma
2023 — conf
A 400MHz 249.1TOPS/W 64Kb Fully-Reconfigurable SRAM-Based Digital Compute-in-Memory Macro for Accelerating CNNs.
A-SSCC
Xin Zhang, Vishal Sharma, Yuncheng Lu, Yong-Jun Jo, Tony Tae-Hyoung Kim
2023 J jnl
Designing a Performance-Centric MAC Unit with Pipelined Architecture for DNN Accelerators.
Circuits Syst. Signal Process.
Gopal Raut, Jogesh Mukala, Vishal Sharma, Santosh Kumar Vishvakarma
2022 J jnl
A 64 Kb Reconfigurable Full-Precision Digital ReRAM-Based Compute-In-Memory for Artificial Intelligence Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Vishal Sharma, Hyunjoon Kim, Tony Tae-Hyoung Kim
2022 J jnl
A Reconfigurable 16Kb AND8T SRAM Macro With Improved Linearity for Multibit Compute-In Memory of Artificial Intelligence Edge Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Vishal Sharma, Ju Eon Kim, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim
2021 C conf
AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing.
ISCAS
Vishal Sharma, Ju Eon Kim, Yong-Jun Jo, Yuzong Chen, Tony Tae-Hyoung Kim
2020 J jnl
A 2.4-GS/s Power-Efficient, High-Resolution Reconfigurable Dynamic Comparator for ADC Architecture.
Circuits Syst. Signal Process.
Gopal Raut, Ambika Prasad Shah, Vishal Sharma, Gunjan Rajput, Santosh Kumar Vishvakarma
2020 — conf
ReRAM Device and Circuit Co-Design Challenges in Nano-scale CMOS Technology.
APCCAS
Lu Lu, Ju Eon Kim, Vishal Sharma, Tony Tae-Hyoung Kim
2018 — conf
A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design.
VDAT
Vishal Sharma, Pranshu Bisht, Abhishek Dalal, Shailesh Singh Chouhan, H. S. Jattana, Santosh Kumar Vishvakarma
2018 J jnl
A write-improved low-power 12T SRAM cell for wearable wireless sensor nodes.
Int. J. Circuit Theory Appl.
Vishal Sharma, Santosh Kumar Vishvakarma, Shailesh Singh Chouhan, Kari Halonen