Virginie Fresse

62 papers C 8Misc 3Journal 20Unranked 31

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A Resource-Driven Approach for Implementing CNNs on FPGAs Using Adaptive IPs. CoRR Philippe Magalhães, Virginie Fresse, Benoît Suffran, Olivier Alata
2025	—	`conf`	Analysis of Warm-Up Effects in GPU Memory Management. ICPP Workshops Julien Tixier, Virginie Fresse, Dominique Houzet
2025	—	`conf`	Clustering de résumés LLM guidés par l'utilisateur : vers une approche constructiviste et réaliste unifiée. CORIA Carl Hatoum, Catherine Combes, Virginie Fresse, Christophe Gravier, Mathieu Orzalesi
2025	—	`conf`	FPGA Resource Dimensioning from Mathematical Models: An Approach for Convolution IP Exploration. ICECET Philippe Magalhães, Virginie Fresse, Benoît Suffran, Olivier Alata
2025	J	`jnl`	Implémentation Efficiente de Fonctions de Convolution sur FPGA à l'Aide de Blocs Paramétrables et d'Approximations Polynomiales. CoRR Philippe Magalhães, Virginie Fresse, Benoît Suffran, Olivier Alata
2025	J	`jnl`	One-Shot Federated Distillation Using Monoclass Teachers: A Study of Knowledge Fragmentation and Out-of-Distribution Supervision. Trans. Mach. Learn. Res. Cedric Maron, Virginie Fresse, Mathieu Orzalesi
2025	—	`conf`	Predictive Modeling of FPGA Resource and Power Consumption for Configurable CNN Operators. ICECS Philippe Magalhães, Virginie Fresse, Benoît Suffran, Olivier Alata
2024	—	`conf`	FLoCoRA: Federated Learning Compression with Low-Rank Adaptation. EUSIPCO Lucas Grativol, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
2024	J	`jnl`	FLoCoRA: Federated learning compression with low-rank adaptation. CoRR Lucas Grativol Ribeiro, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
2024	C	`conf`	PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. ISCAS Lucas Grativol, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel
2024	J	`jnl`	PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. CoRR Lucas Grativol Ribeiro, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel
2023	—	`conf`	Federated learning compression designed for lightweight communications. ICECS Lucas Grativol, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
2023	J	`jnl`	Federated learning compression designed for lightweight communications. CoRR Lucas Grativol Ribeiro, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
2021	J	`jnl`	Accelerating DNNs from local to virtualized FPGA in the Cloud: A survey of trends. J. Syst. Archit. Chen Wu, Virginie Fresse, Benoît Suffran, Hubert Konik
2021	—	`conf`	An approach for an efficient sharing of IP as a Service in cloud FPGA. SSD Rym Skhiri, Virginie Fresse, Jihene Malek, Benoît Suffran, Jean-Paul Jamont
2020	—	`conf`	A Multi-Edge-Agent System approach for sharing heterogeneous computing resources. VTC Fall Florent Carlier, Virginie Fresse, Jean-Paul Jamont, Arnaud Rosay, Loïc Pallardy
2020	C	`conf`	Mathematic models based on multiple-criteria decision analysis for tuning industrial CNN in an FPGA computing cluster. RSP Chen Wu, Virginie Fresse, Benoît Suffran, Hubert Konik
2020	—	`conf`	Pooling of Heterogeneous Computing Resources: A Novel Approach based on Multi-Edge-Agent Concept. ICAART (1) Florent Carlier, Virginie Fresse, Jean-Paul Jamont, Loïc Pallardy, Arnaud Rosay
2019	J	`jnl`	From FPGA to Support Cloud to Cloud of FPGA: State of the Art. Int. J. Reconfigurable Comput. Rym Skhiri, Virginie Fresse, Jean-Paul Jamont, Benoît Suffran, Jihene Malek
2019	—	`conf`	Improving Video Object Detection by Seq-Bbox Matching. VISIGRAPP (5: VISAPP) Hatem Belhassen, Heng Zhang, Virginie Fresse, El-Bay Bourennane
2017	J	`jnl`	A collision management structure for NoC deployment on multi-FPGA. Microprocess. Microsystems Atef Dorai, Virginie Fresse, Catherine Combes, El-Bay Bourennane, Abdellatif Mtibaa
2017	—	`conf`	Challenges of virtualization FPGA in a cloud context. CIVEMSA Rym Skhiri, Virginie Fresse, Jean-Paul Jamont, Benoît Suffran
2017	—	`conf`	Proposition and evaluation of a real-time generic architecture for a laser stripe detection system on FPGA. DASIP Seher Colak, Emmanuel Dumas, Virginie Fresse, Olivier Alata
2016	—	`conf`	A survey of NoC evaluation platforms on FPGAs. FPT Otávio Alcântara de Lima Jr., Weslley N. Costa, Virginie Fresse, Frédéric Rousseau
2016	J	`jnl`	Communication-aware branch and bound with cluster-based latency-constraint mapping technique on network-on-chip. J. Supercomput. Ke Pang, Virginie Fresse, Suying Yao
2016	—	`conf`	FPGA memory optimization for real-time imaging. DASIP Dominique Houzet, Virginie Fresse, Hubert Konik
2016	J	`jnl`	Synthesis of dependency-aware traffic generators from NoC simulation traces. J. Syst. Archit. Otávio Alcântara de Lima Jr., Virginie Fresse, Frédéric Rousseau, Hamed Sheibanyrad
2015	—	`conf`	Differentiated service for NoC-based multimedia applications. ICM Atef Dorai, Virginie Fresse, El-Bay Bourennane, Abdellatif Mtibaa
2015	C	`conf`	Dynamic data flow analysis for NoC based application synthesis. RSP Matthieu Payet, Virginie Fresse, Frédéric Rousseau, Pascal Remy
2015	—	`conf`	Methodological Framework for NoC Resources Dimensioning on FPGAs. FNC/MobiSPC Virginie Fresse, Catherine Combes, Matthieu Payet, Frédéric Rousseau
2015	J	`jnl`	Task mapping and mesh topology exploration for an FPGA-based network on chip. Microprocess. Microsystems Ke Pang, Virginie Fresse, Suying Yao, Otávio Alcântara de Lima Júnior
2014	—	`conf`	A Novel Architecture for Inter-FPGA Traffic Collision Management. CSE Atef Dorai, Virginie Fresse, El-Bay Bourennane, Abdellatif Mtibaa
2014	—	`conf`	Evaluation of SNMP-like protocol to manage a NoC emulation platform. FPT Otávio Alcântara de Lima Júnior, Virginie Fresse, Frédéric Rousseau
2014	—	`conf`	Mathematical Models Applied to On-Chip Network on FPGA for Resource Estimation. CSE Virginie Fresse, Catherine Combes, Hatem Belhasseb
2013	—	`conf`	Adaptive NoC-based MPSoC system for spectral imaging algorithm dedicated to art authentication. EUSIPCO Junyan Tan, Virginie Fresse, Frédéric Rousseau
2013	C	`conf`	FlexOE: A congestion-aware routing algorithm for NoCs. RSP Otávio Alcântara de Lima Júnior, Virginie Fresse, Frédéric Rousseau
2012	—	`conf`	Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. IPTA Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau
2012	C	`conf`	Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. RSP Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau
2011	—	`conf`	Evaluation of CPU and GPU architectures for spectral image analysis algorithms. Parallel Processing for Imaging Applications Virginie Fresse, Dominique Houzet, Christophe Gravier
2011	—	`conf`	From mono-FPGA to multi-FPGA emulation platform for NoC performance evaluations. PARCO Junyan Tan, Virginie Fresse, Frédéric Rousseau
2011	C	`conf`	Generation of emulation platforms for NoC exploration on FPGA. International Symposium on Rapid System Prototyping Junyan Tan, Virginie Fresse, Frédéric Rousseau
2010	J	`jnl`	Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications CoRR Linlin Zhang, Virginie Fresse, Mohammed A. S. Khalid, Dominique Houzet, Anne-Claire Legrand
2010	—	`conf`	Exploration of an adaptive NoC architecture on FPGA dedicated to multi and hysperspectral algorithm for art authentication. IPTA Virginie Fresse, Junyan Tan, Frédéric Rousseau
2010	—	`conf`	GPU architecture evaluation for multispectral and hyperspectral image analysis. DASIP Virginie Fresse, Dominique Houzet, Christophe Gravier
2009	J	`jnl`	Adaptive FPGA NoC-based Architecture for Multispectral Image Correlation CoRR Linlin Zhang, Anne-Claire Legrand, Virginie Fresse, Viktor Fischer
2009	J	`jnl`	Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications. EURASIP J. Embed. Syst. Linlin Zhang, Virginie Fresse, Mohammed A. S. Khalid, Dominique Houzet, Anne-Claire Legrand
2009	—	`conf`	GALS NoC architectures on FPGA dedicated to multispectral image applications. EUSIPCO Linlin Zhang, Virginie Fresse, Anne-Claire Legrand, Mohammed A. S. Khalid
2008	J	`jnl`	A Case Study: Quantitative Evaluation of C-Based High-Level Synthesis Systems. EURASIP J. Embed. Syst. Omar Hammami, Zhoukun Wang, Virginie Fresse, Dominique Houzet
2008	C	`conf`	A quantitative evaluation of C-based synthesis on heterogeneous embedded systems design. ISCAS Omar Hammami, Zhoukun Wang, Virginie Fresse, Dominique Houzet
2008	—	`conf`	Adaptive FPGA NoC-based Architecture for Multispectral Image Correlation. CGIV/MCS Linlin Zhang, Anne-Claire Legrand, Virginie Fresse, Viktor Fischer
2008	J	`jnl`	An adaptive embedded architecture for real-time Particle Image Velocimetry algorithms CoRR Alain Aubert, Nathalie Bochard, Virginie Fresse
2007	J	`jnl`	A Predictive NoC Architecture for Vision Systems Dedicated to Image Analysis. EURASIP J. Embed. Syst. Virginie Fresse, Alain Aubert, Nathalie Bochard
2007	—	`conf`	Rapid prototyping of image analysis algorithms on an adaptive FGPA architecture. EUSIPCO Zahir Larabi, Linlin Zhang, Virginie Fresse, Anne-Claire Legrand
2006	—	`conf`	An adaptive and predictive architecture for parameterised PIV algorithms. FPT Nathalie Bochard, Alain Aubert, Virginie Fresse
2006	—	`conf`	Anadaptive embedded architecture for real-time Particle Image Velocimetry algorithms. EUSIPCO Alain Aubert, Nathalie Bochard, Virginie Fresse
2006	C	`conf`	System on chip FPGA designs of a parameterized particle image velocimetry algorithm. ISCAS Virginie Fresse, Nathalie Bochard, Alain Aubert
2002	Misc	`conf`	A VsynDEx Methodology for Fast Prototyping of Multi-C6x DSP Architectures. PDPTA Jean-François Nezan, Virginie Fresse, Olivier Déforges, Mickaël Raulet
2002	—	`conf`	A high-level development tool dedicated to the generation of cores for the implementation of image processing applications. EUSIPCO Virginie Fresse, Stephen Marshall, Olivier Déforges
2002	J	`jnl`	ARIAL: Rapid Prototyping for Mixed and Parallel Platforms. Parallel Comput. Virginie Fresse, Olivier Déforges
2002	J	`jnl`	AVSynDEx: A Rapid Prototyping Process Dedicated to the Implementation of Digital Image Processing Applications on Multi-DSP and FPGA Architectures. EURASIP J. Adv. Signal Process. Virginie Fresse, Olivier Déforges, Jean-François Nezan
2000	Misc	`conf`	Prototyping for parallel and mixed architectures. Implementation of a new image compression method: LAR. PDPTA Virginie Fresse, Olivier Déforges, Mustapha Assouil
2000	Misc	`conf`	Rapid prototyping for mixed architectures. ICASSP Virginie Fresse, Olivier Déforges, Mustapha Assouil