Vinod Viswanath

16 papers A 1C 2Misc 3Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2024 Misc conf
DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI Applications.
VLSID
Vinod Viswanath, Kanad Chakraborty
2019 — conf
Closing the Verification Gap with Static Sign-off.
ISQED
Pranav Ashar, Vinod Viswanath
2017 — conf
Failures and verification solutions related to untimed paths in SOCs.
ISQED
Pranav Ashar, Vikas Sachdeva, Vinod Viswanath
2016 — conf
Welcome.
ISQED
Brian Cline, Saibal Mukhopadhyay, Peter J. Wright, Hai Li, Vinod Viswanath, Paul Wesling, Gang Qu, Ali Iranmanesh
2013 — conf
On a rewriting strategy for dynamically managing power constraints and power dissipation in SoCs.
ISQED
Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Jacob A. Abraham
2012 J jnl
Automatic and Correct Register Transfer Level Annotations for Low Power Microprocessor Design.
J. Low Power Electron.
Vinod Viswanath, Jacob A. Abraham
2012 J jnl
Power Management Methods: From Specification and Modeling, to Techniques and Verification.
J. Low Power Electron.
Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Ananth S. Narayan
2009 Misc conf
Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL.
VLSI Design
Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham
2009 J jnl
Dedicated Rewriting: Automatic Verification of Low Power Transformations in Register Transfer Level.
J. Low Power Electron.
Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham
2008 J jnl
Sequential equivalence checking between system level and RTL descriptions.
Des. Autom. Embed. Syst.
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham, Jiajin Tu
2007 J jnl
Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems.
IEEE Trans. Computers
Shobha Vasudevan, Vinod Viswanath, Robert W. Sumners, Jacob A. Abraham
2007 Misc conf
Efficient Microprocessor Verification using Antecedent Conditioned Slicing.
VLSI Design
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham
2006 C conf
Automatic decomposition for sequential equivalence checking of system level and RTL descriptions.
MEMOCODE
Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu
2006 A conf
Automatic insertion of low power annotations in RTL for pipelined microprocessors.
DATE
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr.
2004 C conf
Multi-log Processor - Towards Scalable Event-Driven Multiprocessors.
DSD
Vinod Viswanath
1999 — conf
The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture.
ARVLSI
Dana S. Henry, Bradley C. Kuszmaul, Vinod Viswanath