Vinod Pangracious

28 papers C 1Misc 1Journal 8Unranked 17

Year	Rank	Type	Title / Venue / Authors
2022	Misc	`conf`	Blockchain Based Energy Trade. ICDCN Vinod Pangracious
2018	—	`conf`	3D-cool: Design and development of adaptive thermal-aware three-dimensional NoC-based multiprocessor chip. COOL CHIPS Vinod Pangracious, Ranjitha Dash, Ashok Kumar Turuk
2017	—	`conf`	A review of feature extraction for EEG epileptic seizure detection and classification. TSP Larbi Boubchir, Boubaker Daachi, Vinod Pangracious
2017	J	`jnl`	Performance analysis and optimization of cluster-based mesh FPGA architectures: design methodology and CAD tool support. Turkish J. Electr. Eng. Comput. Sci. Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Mohamed Abid, Habib Mehrez
2017	—	`conf`	Thermal Management in 3D Homogeneous NoC Systems Using Optimized Placement of Liquid Microchannels. MCSoC Ranjita Kumari Dash, Vinod Pangracious, José L. Risco-Martín, Ashok Kumar Turuk, Amartya Majumdar, José Luis Ayala
2016	C	`conf`	Exploration of Mesh-Based FPGA Architecture: Comparison of 2D and 3D Technologies in Terms of Power, Area and Performance. PDP Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Habib Mehrez, Mohamed Abid
2016	J	`jnl`	Improvement of cluster-based Mesh FPGA architecture using novel hierarchical interconnect topology and long routing wires. Microprocess. Microsystems Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Mohamed Abid, Habib Mehrez
2016	J	`jnl`	Novel Three-Dimensional Embedded FPGA Technology and Achitecture. SIGARCH Comput. Archit. News Vinod Pangracious, Mulhim Al-Doori
2015	J	`jnl`	Design and Optimization of a Horizontally Partitioned, High-Speed, 3D Tree-Based FPGA. IEEE Micro Vinod Pangracious, Zied Marrakchi, Habib Mehrez
2015	—	`conf`	Mesh of Clusters FPGA Architectures: Exploration Methodology and Interconnect Optimization. ARC Sonda Chtourou, Zied Marrakchi, Vinod Pangracious, Emna Amouri, Habib Mehrez, Mohamed Abid
2015	—	`book`	Three-Dimensional Design Methodologies for Tree-based FPGA Architecture Vinod Pangracious, Zied Marrakchi, Habib Mehrez
2014	J	`jnl`	Architecture level optimization of 3-dimensional tree-based FPGA. Microelectron. J. Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez
2014	—	`conf`	Exploration and optimization of heterogeneous interconnect fabric of 3D tree-based FPGA. DTIS Vinod Pangracious, Zied Marrakchi, Nizar Beltaief, Habib Mehrez, Umer Farooq
2014	—	`conf`	On wiring delays reduction of tree-based FPGA using 3-D fabric. SoCC Vinod Pangracious, Mohamed Sahbi Marrakchi, Habib Mehrez, Zied Marrakchi
2014	—	`conf`	Three-dimensional Mesh of Clusters: An alternative unified high performance interconnect architecture for 3D-FPGA implementation. 3DIC Sonda Chtourou, Mohamed Abid, Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez
2013	—	`conf`	Architecture level TSV count minimization methodology for 3D tree-based FPGA. COOL Chips Vinod Pangracious, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	Design and optimization of heterogeneous tree-based FPGA using 3D technology. FPT Vinod Pangracious, Zied Marrakchi, Habib Mehrez
2013	—	`conf`	Designing 3D tree-based FPGA: Interconnect optimization and thermal analysis. NEWCAS Vinod Pangracious, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	Designing a 3D tree-based FPGA: Optimization of butterfly programmable interconnect topology using 3D technology. 3DIC Vinod Pangracious, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	Exploration environment for 3D heterogeneous tree-based FPGA architectures (3D HT-FPGA). ReConFig Vinod Pangracious, Habib Mehrez, Nizar Beltaief, Zied Marrakchi, Umer Farooq
2013	—	`conf`	High performance 3-dimensional heterogeneous tree-based FPGA architectures (HT-FPGA). FPGAworld Vinod Pangracious, Habib Mehrez, Umer Farooq, Zied Marrakchi
2013	—	`conf`	Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA. ARC Vinod Pangracious, Zied Marrakchi, Emna Amouri, Habib Mehrez
2013	—	`conf`	Physical design exploration of 3D tree-based FPGA architecture. ACM Great Lakes Symposium on VLSI Vinod Pangracious, Emna Amouri, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	TSV count minimization and thermal analysis for 3D Tree-based FPGA. ICICDT Vinod Pangracious, Habib Mehrez, Zied Marrakchi
2012	J	`jnl`	A Novel Methodology for Thermal Aware Silicon Area Estimation for 2D & 3D MPSoCs CoRR Ramya Menon C., Vinod Pangracious
2012	J	`jnl`	Thermal analysis & optimization of a 3 dimensional heterogeneous structure CoRR Ramya Menon C., Vinod Pangracious
2011	J	`jnl`	A Novel Methodology for Thermal Analysis & 3-Dimensional Memory Integration CoRR Annmol Cherian, Ajay Augustine, Jemy Jose, Vinod Pangracious
2009	—	`conf`	Through Silicon Via-Based Grid for Thermal Control in 3D Chips. NanoNet José L. Ayala, Arvind Sridhar, Vinod Pangracious, David Atienza, Yusuf Leblebici