Vinod Menezes

16 papers Misc 6Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2022 — conf
A Multibit MAC Scheme using Switched Capacitor based 3C Multiplier for Analog Compute In-Memory Architecture.
ICECS 2022
Neha Gupta, Ashish Joshi, Dinesh Kushwaha, Vinod Menezes, Rashmi Sachan, Sudeb Dasgupta, Anand Bulusu
2021 Misc conf
150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications.
VLSID
Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan
2019 J jnl
Analysis and Design of Cyclic Switched-Capacitor DC-DC Converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kishalay Datta, Vinod Menezes, Shanthi Pavan
2019 J jnl
Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting.
IEEE J. Solid State Circuits
Sundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan
2018 Misc conf
A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems.
VLSID
R. R. Manikandan, Vipul Kumar Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale
2018 — conf
Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting.
ESSCIRC
Sundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan
2015 — conf
8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm process.
ISSCC
Vipul Kumar Singhal, Vinod Menezes, Srinivasa Chakravarthy, Mahesh Mehendale
2013 Misc conf
A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture.
VLSI Design
Rashmi Sachan, Shahid Ali, Chandan Bist, Sunil Misra, Vinod Menezes, Sharad Gupta, Pat Bosshart
2011 — conf
Design and technology interaction beyond 32nm.
CICC
Michael Clinton, Clive Bittlestone, G. Girishankar, Viet Le, Vinod Menezes
2009 — conf
An enhanced topology for reliability of a high performance 3.3V I/O buffer in a single-well bulk CMOS 1.8v-oxide low voltage process.
ISQED
Karthik Rajagopal, Aatmesh, Vinod Menezes
2008 Misc conf
A Robust Level-Shifter Design for Adaptive Voltage Scaling.
VLSI Design
Ankur Gupta, Rajat Chauhan, Vinod Menezes, Vikas Narang, H. M. Roopashree
2007 — conf
A low-power 333Mbps mobile-double data rate output driver with adaptive feedback to minimize overshoots and undershoots.
ACM Great Lakes Symposium on VLSI
Rachit Kumar Gupta, Vikas Narang, H. M. Roopashree, Vinod Menezes
2005 — conf
A high performance, high voltage output buffer in a low voltage CMOS process.
CICC
Rajat Chauhan, Karthik Rajagopal, Vinod Menezes, H. M. Roopashree, Sanish Koshy Jacob
2003 Misc conf
Optimization of 1.8V I/O circuits for performance, reliability at the 100nm technology node.
VLSI Design
Vinod Menezes, C. B. Keshav, Sushil Gupta, M. Roopashree, S. Krishnan, A. Amerasekera, G. Palau
1997 J jnl
Signal compression through spatial frequency-based motion estimation.
Integr.
Vinod Menezes, S. K. Nandy, Biswadip Mitra
1996 Misc conf
Spatial frequency based motion estimation for image sequence compression.
HiPC
Vinod Menezes, Soumitra Kumar Nandy, Biswadip Mitra