Vinod K. Agarwal

74 papers A* 2A 15B 1C 4Misc 2Journal 39Unranked 11
YearRankTypeTitle / Venue / Authors
1999 — conf
Correct diagnosis of almost all faulty units in a multiprocessor system.
ISCAS (6)
Krishnaiyan Thulasiraman, Anindya Das, Kaiyuan Huang, Vinod K. Agarwal
1999 Misc conf
Invited Talk: Embedded Test for Systems-on-a-Chip.
VLSI Design
Vinod K. Agarwal
1999 Misc conf
VTS 1999 Keynote Address Embedded Test OR External Test.
VTS
Vinod K. Agarwal
1998 J jnl
Correct Diagnosis of Almost All Faulty Units in a Multiprocessor System.
J. Circuits Syst. Comput.
Krishnaiyan Thulasiraman, Anindya Das, Kaiyuan Huang, Vinod K. Agarwal
1998 J jnl
Diagnosis of clustered faults and wafer testing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kaiyuan Huang, Vinod K. Agarwal, Krishnaiyan Thulasiraman
1997 — conf
Embedded Test and Measurement Critical for Deep Submicron Technology.
Asian Test Symposium
Vinod K. Agarwal
1995 J jnl
A Diagnosis Algorithm for Constant Degree Structures and Its Application to VLSI Circuit Testing.
IEEE Trans. Parallel Distributed Syst.
Kaiyuan Huang, Vinod K. Agarwal, Laurence E. LaForge, Krishnaiyan Thulasiraman
1995 J jnl
A Specification-Driven Architectural Design Environment.
Computer
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
1995 J jnl
A quasi-optimal scheduling of intermediate signatures for multiple signature analysis compaction testing schemes.
J. Electron. Test.
D. Lambidonis, Vinod K. Agarwal, André Ivanov, Dhiren Xavier
1995 A conf
Distributed Probabilistic Diagnosis of MCMs on Large Area.
ITC
Koppolu Sasidhar, Abhijit Chatterjee, Vinod K. Agarwal, Joseph L. A. Hughes
1995 J jnl
Fast signature computation for BIST linear compactors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
D. Lambidonis, André Ivanov, Vinod K. Agarwal
1995 J jnl
VTS 1994 Panel Report on BIST for Consumer Products.
IEEE Des. Test Comput.
Vinod K. Agarwal
1994 — conf
A Comparative Study of Multiprocessor List Scheduling Heuristics.
HICSS (1)
Guoning Liao, Erik R. Altman, Vinod K. Agarwal, Guang R. Gao
1994 J jnl
Almost Sure Diagnosis of Almost Every Good Element.
IEEE Trans. Computers
Laurence E. LaForge, Kaiyuan Huang, Vinod K. Agarwal
1994 — conf
DASE: An Environment for System Level Telecommunication Design Exploration and Modelling.
CAST
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
1994 J jnl
Diagnosis of t/(t+1)-Diagnosable Systems.
SIAM J. Comput.
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal
1994 — conf
Performance of Interconnection Network in Multithreaded Architectures.
PARLE
Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal
1994 C conf
VAMP: A Hierarchical Framework for Design for Manufacturability.
ISCAS
Morie E. Malowany, Gordon W. Roberts, Vinod K. Agarwal
1993 — conf
A Novel Methodology Using Genetic Algorithms for the Design of Caches and Cache Replacement Policy.
ICGA
Erik R. Altman, Vinod K. Agarwal, Guang R. Gao
1993 — conf
Analysis of Multithreaded Multiprocessors with Distributed Shared Memory.
SPDP
Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal
1993 J jnl
Built-In Self-Diagnosis for Repairable Embedded RAMs.
IEEE Des. Test Comput.
Robert P. Treuer, Vinod K. Agarwal
1993 J jnl
Distributed Fault diagnosis of a Ring of Processors.
Parallel Process. Lett.
Anindya Das, Krishnaiyan Thulasiraman, K. B. Lakshmanan, Vinod K. Agarwal
1993 A conf
Fault Location Algorithms for Repairable Embedded.
ITC
Robert P. Treuer, Vinod K. Agarwal
1993 J jnl
Multiprocessor Fault Diagnosis Under Local Constraints.
IEEE Trans. Computers
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal, K. B. Lakshmanan
1993 C conf
The design of a library support system for a telecommunication system synthesis environment.
RSP
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
1992 C conf
A system level synthesis framework for computer architectures.
RSP
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
1992 J jnl
BIST of PCB interconnects using boundary-scan architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Abu S. M. Hassan, Vinod K. Agarwal, Benoit Nadeau-Dostie, Janusz Rajski
1992 J jnl
Computing the probability of undetected error for shortened cyclic codes.
IEEE Trans. Commun.
Vinod K. Agarwal, André Ivanov
1992 J jnl
Distributed Diagnosis Algorithms for Regular Interconnected Structures.
IEEE Trans. Computers
Arun K. Somani, Vinod K. Agarwal
1992 C conf
Performance Evaluation of Latency Tolerant Architectures.
ICCI
Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal
1992 J jnl
Using an asymmetric error model to study aliasing in signature analysis registers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal
1992 — conf
Wafer Testing with Pairwise Comparisons.
FTCS
Kaiyuan Huang, Vinod K. Agarwal, Laurence E. LaForge
1991 J jnl
Diagnosis of T/S-Diagnosable Systems.
J. Circuits Syst. Comput.
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal
1991 A conf
Fast Signature Computation for Linear Compactors.
ITC
D. Lambidonis, André Ivanov, Vinod K. Agarwal
1991 J jnl
Iterative algorithms for computing aliasing probabilities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
André Ivanov, Corot W. Starke, Vinod K. Agarwal, Wilfried Daehn, Matthias Gruetzner, Tom W. Williams
1990 A conf
A new procedure for weighted random built-in self-test.
ITC
Fidel Muradali, Vinod K. Agarwal, Benoit Nadeau-Dostie
1990 J jnl
Optimizing error masking in BIST by output data modification.
J. Electron. Test.
Yervant Zorian, Vinod K. Agarwal
1990 J jnl
Serial Interfacing for Embedded-Memory Testing.
IEEE Des. Test Comput.
Benoit Nadeau-Dostie, Allan Silburt, Vinod K. Agarwal
1989 A conf
: Experiments on Aliasing in Signature Analysis Registers.
ITC
Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal
1989 A conf
A diagnosis method using pseudo-random vectors without intermediate signatures.
ICCAD
Robert C. Aitken, Vinod K. Agarwal
1989 J jnl
An analysis of the probabilistic behavior of linear feedback signature registers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
André Ivanov, Vinod K. Agarwal
1989 — conf
Distributed syndrome decoding for regular interconnected structures.
FTCS
Arun K. Somani, Vinod K. Agarwal
1989 J jnl
On the Complexity of Single Fault Set Diagnosability and Diagnosis Problems.
IEEE Trans. Computers
Arun K. Somani, Vinod K. Agarwal, David Avis
1989 A conf
Testing of Glue Logic Interconnects Using Boundary Scan Architecture.
ITC
Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski, Benoit Nadeau-Dostie
1989 B conf
t/s-Diagnosable Systems: A Characterization and Diagnosis Algorithm.
WG
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal, K. B. Lakshmanan
1988 J jnl
A Reconfiguration Scheme for Yield Enhancement of Large Area Binary Tree Architectures.
IEEE Trans. Computers
Michael C. Howells, Vinod K. Agarwal
1988 A conf
Aliasing probability of non-exhaustive randomized syndrome tests.
ICCAD
Robert C. Aitken, Vinod K. Agarwal
1988 — conf
An iterative technique for calculating aliasing probability of linear feedback signature registers.
FTCS
André Ivanov, Vinod K. Agarwal
1988 J jnl
Dynamic testability measures for ATPG.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
André Ivanov, Vinod K. Agarwal
1988 A conf
On Multiple Fault Coverage and Aliasing Probability Measures.
ITC
Henry Cox, André Ivanov, Vinod K. Agarwal, Janusz Rajski
1988 A conf
Testing and Diagnosis of Interconnects Using Boundary Scan Architecture.
ITC
Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski
1987 J jnl
A Generalized Theory for System Level Diagnosis.
IEEE Trans. Computers
Arun K. Somani, Vinod K. Agarwal, David Avis
1987 J jnl
A New Built-In Self-Test Design for PLA's with High Fault Coverage and Low Overhead.
IEEE Trans. Computers
Robert P. Treuer, Vinod K. Agarwal, Hideo Fujiwara
1987 J jnl
Testing and Applications of Inverter-Free PLAs.
IEEE Des. Test
Janusz Rajski, Vinod K. Agarwal
1986 J jnl
A Fault-Tolerant Modular Architecture for Binary Trees.
IEEE Trans. Computers
A. S. Mahmudul Hassan, Vinod K. Agarwal
1986 J jnl
A Theory for the Design of Soft-Error-Tolerant VLSI Circuits.
IEEE J. Sel. Areas Commun.
Yvon Savaria, Jeremiah F. Hayes, Nicholas C. Rumin, Vinod K. Agarwal
1986 J jnl
McBOOLE: A New Procedure for Exact Logic Minimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michel R. Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
1986 A conf
Testability Measures : What Do They Do for ATPG ?
ITC
André Ivanov, Vinod K. Agarwal
1985 J jnl
An Efficient Unsorted VLSI Dictionary Machine.
IEEE Trans. Computers
Arun K. Somani, Vinod K. Agarwal
1985 J jnl
Implementing a Built-In Self-Test PLA Design.
IEEE Des. Test
Robert P. Treuer, Hideo Fujiwara, Vinod K. Agarwal
1985 A conf
Testing Properties and Applications of Inverter-Free PLA's.
ITC
Vinod K. Agarwal, Janusz Rajski
1985 A* conf
The McBOOLE logic minimizer.
DAC
Michel R. Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
1984 A conf
A Design for Machines with Built-In Tolerance to Soft Errors.
ITC
Yvon Savaria, Vinod K. Agarwal, Nicholas C. Rumin, Jeremiah F. Hayes
1984 A* conf
An Efficient VLSI Dictionary Machine.
ISCA
Arun K. Somani, Vinod K. Agarwal
1984 J jnl
Data Flow Anomaly Detection.
IEEE Trans. Software Eng.
Jacek Jachner, Vinod K. Agarwal
1984 A conf
Higher Certainty of Error Coverage by Output Data Modification.
ITC
Yervant Zorian, Vinod K. Agarwal
1983 A conf
Non-Stuck-At Fault Detection in nMOS Circuits by Region Analysis.
ITC
Michael G. Lamoureux, Vinod K. Agarwal
1981 J jnl
Multiple Fault Testing of Large Circuits by Single Fault Test Sets.
IEEE Trans. Computers
Vinod K. Agarwal, Andy S. F. Fung
1980 — conf
A microprocessor based tea dryer controller.
SIGSMALL
S. S. S. P. Rao, Vinod K. Agarwal
1980 J jnl
Generic Fault Characterizations for Table Look-Up Coverage Bounding.
IEEE Trans. Computers
Vinod K. Agarwal, Gerald M. Masson
1980 J jnl
Multiple Fault Detection in Programmable Logic Arrays.
IEEE Trans. Computers
Vinod K. Agarwal
1979 J jnl
A Functional Form Approach to Test Set Coverage in Tree Networks.
IEEE Trans. Computers
Vinod K. Agarwal, Gerald M. Masson
1979 J jnl
Recursive Coverage Projection of Test Sets.
IEEE Trans. Computers
Vinod K. Agarwal, Gerald M. Masson
1977 J jnl
Resolution-Oriented Fault Interrelationships in Combinational Logic Networks.
IEEE Trans. Computers
Vinod K. Agarwal, Gerald M. Masson