Vincenzo Rana

61 papers A* 2A 8B 3C 12Misc 2Journal 9Unranked 25
YearRankTypeTitle / Venue / Authors
2022 — conf
A Protocol for On-Chain Tenders.
PerCom Workshops
Francesco Bruschi, Tommaso Paulon, Vincenzo Rana, Donatella Sciuto
2021 C conf
A privacy preserving identification protocol for smart contracts.
ISCC
Francesco Bruschi, Tommaso Paulon, Vincenzo Rana, Donatella Sciuto
2021 J jnl
Tunneling Trust Into the Blockchain: A Merkle Based Proof System for Structured Documents.
IEEE Access
Francesco Bruschi, Vincenzo Rana, Alessio Pagani, Donatella Sciuto
2020 C conf
A Decentralized System for Fair Token Distribution and Seamless Users Onboarding.
ISCC
Francesco Bruschi, Manuel Tumiati, Vincenzo Rana, Mattia Bianchi, Donatella Sciuto
2020 — conf
Acknowledging Value of Personal Information: a Privacy Aware Data Market for Health and Social Research.
DLT@ITASEC
Francesco Bruschi, Vincenzo Rana, Alessio Pagani, Donatella Sciuto
2018 J jnl
BuildingRules: A Trigger-Action-Based System to Manage Complex Commercial Buildings.
ACM Trans. Cyber Phys. Syst.
Alessandro Antonio Nacci, Vincenzo Rana, Bharathan Balaji, Paola Spoletini, Rajesh K. Gupta, Donatella Sciuto, Yuvraj Agarwal
2018 J jnl
Mine with it or sell it: the superhashing power dilemma.
SIGMETRICS Perform. Evaluation Rev.
Francesco Bruschi, Vincenzo Rana, Lorenzo Gentile, Donatella Sciuto
2017 — conf
An embedded Gabor-based palm vein recognition system.
BHI
Pierandrea Cancian, Guido Walter Di Donato, Vincenzo Rana, Marco D. Santambrogio
2017 — conf
Time of arrival cumulative probability in public transportation travel assistance.
ITSC
Alessio Pagani, Francesco Bruschi, Vincenzo Rana
2017 — conf
User context estimation for public travel assistance and intelligent service scheduling.
ITSC
Alessio Pagani, Francesco Bruschi, Vincenzo Rana, Marcello Restelli
2016 J jnl
Efficient Hardware Design of Iterative Stencil Loops.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Vincenzo Rana, Ivan Beretta, Francesco Bruschi, Alessandro Antonio Nacci, David Atienza, Donatella Sciuto
2016 J jnl
Parallelizing the Chambolle Algorithm for Performance-Optimized Mapping on FPGA Devices.
ACM Trans. Embed. Comput. Syst.
Ivan Beretta, Vincenzo Rana, Abdulkadir Akin, Alessandro Antonio Nacci, Donatella Sciuto, David Atienza
2016 — conf
Reconstruction of public transport state.
ITSC
Alessio Pagani, Francesco Bruschi, Vincenzo Rana, Marcello Restelli
2016 — conf
Ruleset Minimization in Multi-tenant Smart Buildings.
CSE/EUC/DCABES
Andrea Piscitello, Alessandro Antonio Nacci, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2016 — conf
Sink state analysis in multi-tenant smart buildings.
RTSI
Andrea Piscitello, Alessandro Antonio Nacci, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2014 J jnl
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms.
ACM Trans. Reconfigurable Technol. Syst.
Juan Antonio Clemente, Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
2014 C conf
A Perspective Vision on Complex Residential Building Management Systems.
EUC
Alessandro Antonio Nacci, Vincenzo Rana, Donatella Sciuto
2014 — conf
A SystemC-based framework for the simulation of appliances networks in energy-aware smart spaces.
WF-IoT
A. A. Nacci, Giovanni Bettinazzi, Christian Pilato, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2014 C conf
An Open-Source, Efficient, and Parameterizable Hardware Implementation of the AES Algorithm.
ISPA
Alessandro Antonio Nacci, Vincenzo Rana, Donatella Sciuto, Marco Domenico Santambrogio
2014 — conf
BlueSentinel: a first approach using iBeacon for an energy efficient occupancy detection system.
BuildSys
Giorgio Conte, Massimo De Marchi, Alessandro Antonio Nacci, Vincenzo Rana, Donatella Sciuto
2014 A conf
Improving the security and the scalability of the AES algorithm (abstract only).
FPGA
Alessandro Antonio Nacci, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2014 C conf
On How to Efficiently Implement Regular Expression Matching on FPGA-Based Systems.
EUC
Vincenzo Rana, Francesco Bruschi, Marco Paolieri, Donatella Sciuto, Marco Domenico Santambrogio
2013 A* conf
A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices.
DAC
Alessandro Antonio Nacci, Vincenzo Rana, Francesco Bruschi, Donatella Sciuto, Ivan Beretta, David Atienza
2013 J jnl
Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms.
IEEE Des. Test
Vincenzo Rana, Alessandro Antonio Nacci, Ivan Beretta, Marco D. Santambrogio, David Atienza, Donatella Sciuto
2012 C conf
B
BSN
Paolo Roberto Grassi, Vincenzo Rana, Ivan Beretta, Donatella Sciuto
2012 A* conf
Design exploration of energy-performance trade-offs for wireless sensor networks.
DAC
Ivan Beretta, Francisco J. Rincón, Nadia Khaled, Paolo Roberto Grassi, Vincenzo Rana, David Atienza
2012 Misc conf
Knowledge-based design space exploration of wireless sensor networks.
CODES+ISSS
Paolo Roberto Grassi, Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
2012 — conf
Model-based design for wireless body sensor network nodes.
LATW
Ivan Beretta, Francisco J. Rincón, Nadia Khaled, Paolo Roberto Grassi, Vincenzo Rana, David Atienza, Donatella Sciuto
2012 C conf
Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks.
DSD
Paolo Roberto Grassi, Vincenzo Rana, Ivan Beretta, Donatella Sciuto
2011 B conf
A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware.
FPL
Juan Antonio Clemente, Vincenzo Rana, Donatella Sciuto, Ivan Beretta, David Atienza
2011 J jnl
A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
2011 A conf
A high-performance parallel implementation of the Chambolle algorithm.
DATE
Abdulkadir Akin, Ivan Beretta, A. A. Nacci, Vincenzo Rana, Marco D. Santambrogio, David Atienza
2011 A conf
An efficient Quantum-Dot Cellular Automata adder.
DATE
Francesco Bruschi, Francesco Perini, Vincenzo Rana, Donatella Sciuto
2011 J jnl
Island-Based Adaptable Embedded System Design.
IEEE Embed. Syst. Lett.
Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
2011 — conf
On-chip network resource management design and validation.
ICSAMOS
Francesco Bruschi, Antonio Miele, Vincenzo Rana
2010 B conf
A Reconfigurable System Based on a Parallel and Pipelined Solution for Regular Expression Matching.
FPL
Francesco Bruschi, Marco Paolieri, Vincenzo Rana
2010 — conf
A novel design framework for the design of reconfigurable systems based on NoCs.
ACM Great Lakes Symposium on VLSI
Vincenzo Rana, Donatella Sciuto
2010 — conf
Operating system runtime management of partially dynamically reconfigurable embedded systems.
ESTIMedia
Marco D. Santambrogio, Vincenzo Rana, Ivan Beretta, Donatella Sciuto
2010 C conf
Run-time mapping of applications on FPGA-based reconfigurable systems.
ISCAS
Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
2009 Misc conf
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems.
CODES+ISSS
Vincenzo Rana, Srinivasan Murali, David Atienza, Marco D. Santambrogio, Luca Benini, Donatella Sciuto
2009 A conf
On-line task management for a reconfigurable cryptographic architecture.
IPDPS
Ivan Beretta, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2009 — conf
Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices.
ACM Great Lakes Symposium on VLSI
Dario Cozzi, Claudia Farè, Alessandro Meroni, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2008 — conf
A Generation Flow for Self-Reconfiguration Controllers Customization.
DELTA
Andrea Cuoccio, Paolo Roberto Grassi, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2008 — conf
A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication.
VLSI-SoC (Selected Papers)
Vincenzo Rana, David Atienza, Marco D. Santambrogio, Donatella Sciuto, Giovanni De Micheli
2008 — conf
A Requirements-Driven Reconfigurable SoC Communication Infrastructure Design Flow.
DELTA
Alessandro Meroni, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2008 C conf
A Requirements-Driven Simulation Framework for Communication Infrastructures Design.
FDL
Alessandro Meroni, Vincenzo Rana, Marco D. Santambrogio, Francesco Bruschi
2008 — conf
A light-weight Network-on-Chip architecture for dynamically reconfigurable systems.
ICSAMOS
Simone Corbetta, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2008 — conf
An architecture for dynamically reconfigurable real time audio processing systems.
ESTIMedia
Francesco Bruschi, Vincenzo Rana, Donatella Sciuto
2008 — conf
Design of Communication Infrastructures for Reconfigurable Systems.
FDL (Selected Papers)
Alessandro Meroni, Vincenzo Rana, Marco D. Santambrogio, Francesco Bruschi
2008 A conf
HARPE: A Harvard-based processing element tailored for partial dynamic reconfigurable architectures.
IPDPS
Alessio Montone, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2008 — conf
Low cost smartcams design.
ESTIMedia
Vincenzo Rana, Matteo Matteucci, Daniele Caltabiano, Roberto Sannino, Andrea Bonarini
2008 B conf
Operating system support for online partial dynamic reconfiguration management.
FPL
Marco D. Santambrogio, Vincenzo Rana, Donatella Sciuto
2008 — conf
The Shining embedded system design methodology based on self dynamic reconfigurable architectures.
ASP-DAC
Carlo Curino, Luca Fossati, Vincenzo Rana, Francesco Redaelli, Marco D. Santambrogio, Donatella Sciuto
2007 A conf
A novel SoC design methodology combining adaptive software and reconfigurable hardware.
ICCAD
Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto
2007 C conf
An adaptive genetic algorithm for dynamically reconfigurable modules allocation.
VLSI-SoC
Vincenzo Rana, Chiara Sandionigi, Marco D. Santambrogio, Donatella Sciuto
2007 — conf
An adaptive genetic algorithm for dynamically reconfigurable modules allocation.
VLSI-SoC (Selected Papers)
Vincenzo Rana, Chiara Sandionigi, Marco D. Santambrogio, Donatella Sciuto
2007 C conf
Dynamic Reconfigurability in Embedded System Design.
ISCAS
Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2007 A conf
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux.
IPDPS
Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto, Boris Kettelhoit, Markus Köster, Mario Porrmann, Ulrich Rückert
2006 — conf
Combining hardware reconfiguration and adaptive computation for a novel SoC design methodology.
FPT
Vincenzo Rana, Marco D. Santambrogio, Seda Ogrenci Memik, Donatella Sciuto
2006 C conf
Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow.
VLSI-SoC
Matteo Murgida, Alessandro Panella, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto
2006 A conf
VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow.
IPDPS
Fabrizio Ferrandi, Giovanna Ferrara, Roberto Palazzo, Vincenzo Rana, Marco D. Santambrogio