Vincenzo Catania

178 papers A* 5A 9B 16C 17Misc 10Journal 67Unranked 53

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Assessing the Role of Communication in Modular Multi-Core Quantum Systems. ACM Trans. Design Autom. Electr. Syst. Maurizio Palesi, Enrico Russo, Giuseppe Ascia, Hamaad Rafique, Davide Patti, Vincenzo Catania, Sergi Abadal, Abhijit Das, Pau Escofet, Eduard Alarcón, Carmen G. Almudéver
2025	J	`jnl`	Assessing the Role of Communication in Modular Multi-Core Quantum Systems. CoRR Maurizio Palesi, Enrico Russo, Giuseppe Ascia, Hamaad Rafique, Davide Patti, Vincenzo Catania, Sergi Abadal, Abhijit Das, Pau Escofet, Eduard Alarcón, Carmen G. Almudéver
2025	A	`conf`	Optimizing Qubit Assignment in Modular Quantum Systems via Attention-Based Deep Reinforcement Learning. DATE Enrico Russo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2024	A*	`conf`	A Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems. DAC Francesco Giulio Blanco, Enrico Russo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2024	—	`conf`	A Novel Timechain-Level Approach to the Modeling of the Bitcoin Lightning Network. Blockchain Davide Patti, Salvatore Monteleone, Enrico Russo, Maurizio Palesi, Vincenzo Catania
2024	C	`conf`	Abstracting Bitcoin Lightning Network Complexity with Ultraviolet. ICBC Davide Patti, Salvatore Monteleone, Enrico Russo, Maurizio Palesi, Vincenzo Catania
2024	—	`conf`	Assessing the Role of Communication in Scalable Multi-Core Quantum Architectures. MCSoC Maurizio Palesi, Enrico Russo, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2024	J	`jnl`	Attention-Based Deep Reinforcement Learning for Qubit Allocation in Modular Quantum Architectures. CoRR Enrico Russo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2024	J	`jnl`	Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems. CoRR Francesco Giulio Blanco, Enrico Russo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2024	C	`conf`	Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning. ISCAS Enrico Russo, Francesco Giulio Blanco, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Vincenzo Catania
2024	J	`jnl`	Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning. CoRR Enrico Russo, Francesco Giulio Blanco, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Vincenzo Catania
2023	—	`conf`	Memory-Aware DNN Algorithm-Hardware Mapping via Integer Linear Programming. CF Enrico Russo, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Salvatore Monteleone, Vincenzo Catania
2023	J	`jnl`	Multiobjective End-to-End Design Space Exploration of Parameterized DNN Accelerators. IEEE Internet Things J. Enrico Russo, Maurizio Palesi, Davide Patti, Salvatore Monteleone, Giuseppe Ascia, Vincenzo Catania
2023	—	`conf`	m-BMC: Exploration of Magnetic Field Measurements for Indoor Positioning Using mini-Batch Magnetometer Calibration. MOST Hamaad Rafique, Davide Patti, Maurizio Palesi, Vincenzo Catania
2022	—	`conf`	Combined Application of Approximate Computing Techniques in DNN Hardware Accelerators. IPDPS Workshops Enrico Russo, Maurizio Palesi, Davide Patti, Habiba Lahdhiri, Salvatore Monteleone, Giuseppe Ascia, Vincenzo Catania
2022	J	`jnl`	DNN Model Compression for IoT Domain-Specific Hardware Accelerators. IEEE Internet Things J. Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Andrea Mineo, Giuseppe Ascia, Vincenzo Catania
2022	—	`conf`	Exploiting the Approximate Computing Paradigm with DNN Hardware Accelerators. MECO Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Habiba Lahdhiri, Giuseppe Ascia, Vincenzo Catania
2022	A	`conf`	MEDEA: A Multi-objective Evolutionary Approach to DNN Hardware Mapping. DATE Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2021	J	`jnl`	An Introduction to Patterns for the Internet of Robotic Things in the Ambient Assisted Living Scenario. Robotics Bruno Andò, Luciano Cantelli, Vincenzo Catania, Ruben Crispino, Dario Calogero Guastella, Salvatore Monteleone, Giovanni Muscato
2021	—	`conf`	LAMBDA: An Open Framework for Deep Neural Network Accelerators Simulation. PerCom Workshops Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2020	—	`conf`	Cloud-Based Energy Efficient Scheme for Sigfox Monarch as Asset Tracking Service. COINS Andrea Mineo, Maurizio Palesi, Davide Patti, Vincenzo Catania
2020	C	`conf`	DNNZip: Selective Layers Compression Technique in Deep Neural Network Accelerators. DSD Habiba Lahdhiri, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Jordane Lorandel, Emmanuelle Bourdel, Vincenzo Catania
2020	J	`jnl`	Exploiting Data Resilience in Wireless Network-on-chip Architectures. ACM J. Emerg. Technol. Comput. Syst. Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose, Valerio Mario Salerno
2020	J	`jnl`	Impact of Users' Beliefs in Text-Based Linguistic Interaction. IEEE Access Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2020	—	`conf`	Improving Inference Latency and Energy of DNNs through Wireless Enabled Multi-Chip-Module-based Architectures and Model Parameters Compression. NOCS Giuseppe Ascia, Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2020	—	`conf`	Improving Inference Latency and Energy of Network-on-Chip based Convolutional Neural Networks through Weights Compression. IPDPS Workshops Giuseppe Ascia, Vincenzo Catania, John Jose, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2019	—	`conf`	Analyzing networks-on-chip based deep neural networks. NOCS Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
2019	J	`jnl`	GOOSE: goal oriented orchestration for smart environments. Int. J. Ad Hoc Ubiquitous Comput. Vincenzo Catania, Gaetano Carmelo La Delfa, Salvatore Monteleone, Davide Patti, Daniela Ventura, Giuseppe La Torre
2019	—	`conf`	Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices. IoTSMS Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
2018	—	`conf`	Approximate Wireless Networks-on-Chip. DCIS Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
2018	J	`jnl`	Improving Energy Efficiency in Wireless Network-on-Chip Architectures. ACM J. Emerg. Technol. Comput. Syst. Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2018	—	`conf`	Improving energy consumption of NoC based architectures through approximate communication. MECO Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
2018	C	`conf`	Packetization of Shared-Memory Traces for Message Passing Oriented NoC Simulation. ISC Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2018	—	`conf`	smARTworks: A Multi-sided Context-aware Platform for the Smart Museum. PECCS Salvatore Michele Biondi, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2017	B	`conf`	Bus as a sensor: A mobile sensor nodes network for the air quality monitoring. WiMob Salvatore Michele Biondi, Vincenzo Catania, Salvatore Monteleone, Carmelo Polito
2017	J	`jnl`	User-Generated Services Composition in Smart Multi-User Environments. J. Sens. Actuator Networks Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Daniela Panno, Davide Patti
2016	—	`conf`	A Context-Aware Smart Parking System. SITIS Salvatore Michele Biondi, Salvatore Monteleone, Giuseppe La Torre, Vincenzo Catania
2016	—	`conf`	A Context-Aware Solution to Improve Web Service Discovery and User-Service Interaction. UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld Giuseppe La Torre, Salvatore Monteleone, Marco Cavallo, Valeria D'Amico, Vincenzo Catania
2016	J	`jnl`	Cycle-Accurate Network on Chip Simulation with Noxim. ACM Trans. Model. Comput. Simul. Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016	A	`conf`	Energy efficient transceiver in wireless Network on Chip architectures. DATE Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016	J	`jnl`	Exploiting antenna directivity in wireless NoC architectures. Microprocess. Microsystems Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2016	—	`conf`	Improving the energy efficiency of wireless Network on Chip architectures through online selective buffers and receivers shutdown. CCNC Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016	C	`conf`	Making Android Apps Data-Leak-Safe by Data Flow Analysis and Code Injection. WETICE Giuseppe Ascia, Vincenzo Catania, Raffaele Di Natale, Andrea Fornaia, Misael Mongiovì, Salvatore Monteleone, Giuseppe Pappalardo, Emiliano Tramontana
2016	J	`jnl`	On-Chip Communication Energy Reduction Through Reliability Aware Adaptive Voltage Swing Scaling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Partha Pratim Pande, Vincenzo Catania
2016	J	`jnl`	Performance analysis of visualmarkers for indoor navigation systems. Frontiers Inf. Technol. Electron. Eng. Gaetano Carmelo La Delfa, Salvatore Monteleone, Vincenzo Catania, Juan F. De Paz, Javier Bajo
2016	J	`jnl`	Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures. IEEE Trans. Very Large Scale Integr. Syst. Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2016	J	`jnl`	Security analysis and resource requirements of group-oriented user access control for hardware-constrained wireless network services. Log. J. IGPL Daniela Ventura, Aitor Gómez-Goiri, Vincenzo Catania, Diego López-de-Ipiña, J. A. M. Naranjo, Leocadio G. Casado
2015	—	`conf`	A Decision Support System for Hotel Facilities Inventory Management. DEXA (1) Giuseppe Monteleone, Raffaele Di Natale, Piero Conca, Salvatore Michele Biondi, Antonio Rosario Intilisano, Vincenzo Catania, Daniela Panno
2015	A	`conf`	A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures. DATE Andrea Mineo, Mohd Shahrizal Rusli, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono
2015	—	`conf`	Autonomous Composition and Execution of REST APIs for Smart Sensors. SSN-TC/OrdRing@ISWC Daniela Ventura, Ruben Verborgh, Vincenzo Catania, Erik Mannens
2015	—	`conf`	Computer Vision Based Indoor Navigation: A Visual Markers Evaluation. ISAmI Gaetano Carmelo La Delfa, Vincenzo Catania, Salvatore Monteleone, Juan Francisco de Paz, Javier Bajo
2015	J	`jnl`	Coupling Routing Algorithm and Data Encoding for Low Power Networks on Chip. J. Comput. Sci. Maurizio Palesi, Davide Patti, Giuseppe Ascia, Daniela Panno, Vincenzo Catania
2015	—	`conf`	Noxim: An open, extensible and cycle-accurate network on chip simulator. ASAP Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2015	J	`jnl`	Parameter Space Representation of Pareto Front to Explore Hardware-Software Dependencies. ACM Trans. Embed. Comput. Syst. Vincenzo Catania, Andrea Araldo, Davide Patti
2015	—	`conf`	Smart EDIFICE - Smart EveryDay interoperating future devICEs. CTS Daniela Ventura, Salvatore Monteleone, Giuseppe La Torre, Gaetano Carmelo La Delfa, Vincenzo Catania
2015	B	`conf`	User-Generated services: Policy Management and access control in a cross-domain environment. IWCMC Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Daniela Panno, Davide Patti
2014	—	`conf`	A Closed Loop Control based Power Manager for WiNoC Architectures. MES Mohd Shahrizal Rusli, Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono
2014	—	`conf`	A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks. MES Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti
2014	—	`conf`	ARIIMA: A Real IoT Implementation of a Machine-Learning Architecture for Reducing Energy Consumption. UCAmI Daniela Ventura, Diego Casado Mansilla, Juan Lopez-de-Armentia, Pablo Garaizar, Diego López-de-Ipiña, Vincenzo Catania
2014	A	`conf`	An adaptive transmitting power technique for energy efficient mm-wave wireless NoCs. DATE Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2014	Misc	`conf`	An approch for monitoring and smart planning of urban solid waste management using smart-M3 platform. FRUCT Vincenzo Catania, Daniela Ventura
2014	J	`jnl`	Distributed topology discovery in self-assembled nano network-on-chip. Comput. Electr. Eng. Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti
2014	—	`conf`	Introducing Consciousnet : Internet Content as an Environment for Human-Machine Interaction. HCI (2) Vincenzo Catania, Davide Patti, Mariagrazia Sciacca
2014	—	`conf`	Merging Compilation and Microarchitectural Configuration Spaces for Performance/Power Optimization in VLIW-Based Systems. CSOC Davide Patti, Maurizio Palesi, Vincenzo Catania
2014	—	`conf`	Topology Discovery in Deadlock Free Self-assembled DNA Networks. CSOC Davide Patti, Andrea Mineo, Salvatore Monteleone, Vincenzo Catania
2013	—	`conf`	A first effort for a distributed segment-based approach on self-assembled nano networks. NoCArc@MICRO Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti
2013	C	`conf`	An Adaptive Output Selection Function Based on a Fuzzy Rule Base System for Network on Chip. DSD Giuseppe Ascia, Maurizio Palesi, Vincenzo Catania
2013	—	`conf`	Low Energy Mapping Techniques under Reliability and Bandwidth Constraints. HPCC/EUC Andrea Mineo, Marina Masi, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2013	—	`conf`	NoC links energy reduction through link voltage scaling. ICSAMOS Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2013	C	`conf`	Runtime Online Links Voltage Scaling for Low Energy Networks on Chip. DSD Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2013	—	`conf`	SecureDroid: An Android security framework extension for context-aware policy enforcement. PRISMS Valerio Arena, Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Fabio Ricciato
2012	—	`conf`	A Novel Approach to Web of Things: M2M and Enhanced Javascript Technologies. GreenCom Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Davide Patti, Stefano Vercelli, Fabio Ricciato
2012	—	`conf`	A Study on Evolutionary Multi-Objective Optimization with Fuzzy Approximation for Computational Expensive Problems. PPSN (2) Alessandro G. Di Nuovo, Giuseppe Ascia, Vincenzo Catania
2012	J	`jnl`	Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach. J. Univers. Comput. Sci. Maurizio Palesi, Rafael Tornero, Juan Manuel Orduña, Vincenzo Catania, Daniela Panno
2012	J	`jnl`	Supporting Undergraduate Computer Architecture Students Using a Visual MIPS64 CPU Simulator. IEEE Trans. Educ. Davide Patti, Andrea Spadaccini, Maurizio Palesi, Fabrizio Fazzino, Vincenzo Catania
2011	—	`ch.`	Application-Specific Routing Algorithms for Low Power Network on Chip Design. Low Power Networks-on-Chip Maurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania
2011	J	`jnl`	Data Encoding Schemes in Networks on Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Maurizio Palesi, Giuseppe Ascia, Fabrizio Fazzino, Vincenzo Catania
2011	J	`jnl`	Performance evaluation of efficient multi-objective evolutionary algorithms for design space exploration of embedded computer systems. Appl. Soft Comput. Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2010	C	`conf`	An Efficient Technique for In-order Packet Delivery with Adaptive Routing Algorithms in Networks on Chip. DSD Maurizio Palesi, Rickard Holsmark, Xiaohang Wang, Shashi Kumar, Mei Yang, Yingtao Jiang, Vincenzo Catania
2010	J	`jnl`	Leveraging Partially Faulty Links Usage for Enhancing Yield and Performance in Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Maurizio Palesi, Shashi Kumar, Vincenzo Catania
2009	C	`conf`	An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded Architectures. DSD Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti, Gianmarco De Francisci Morales
2009	J	`jnl`	Application Specific Routing Algorithms for Networks on Chip. IEEE Trans. Parallel Distributed Syst. Maurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania
2009	J	`jnl`	Bandwidth-aware routing algorithms for networks-on-chip platforms. IET Comput. Digit. Tech. Maurizio Palesi, Shashi Kumar, Vincenzo Catania
2009	C	`conf`	Data Encoding for Low-Power in Wormhole-Switched Networks-on-Chip. DSD Maurizio Palesi, Fabrizio Fazzino, Giuseppe Ascia, Vincenzo Catania
2009	B	`conf`	Feedforward artificial neural network to estimate iq of mental retarded people from different psychometric instruments. IJCNN Alessandro G. Di Nuovo, Santo Di Nuovo, Serafino Buono, Vincenzo Catania
2009	C	`conf`	Linguistic Modifiers to Improve the Accuracy-Interpretability Trade-Off in Multi-Objective Genetic Design of Fuzzy Rule Based Classifier Systems. ISDA Alessandro G. Di Nuovo, Vincenzo Catania
2008	B	`conf`	An evolutionary fuzzy c-means approach for clustering of bio-informatics databases. FUZZ-IEEE Alessandro G. Di Nuovo, Vincenzo Catania
2008	—	`conf`	Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms. NOCS Maurizio Palesi, Giuseppe Longo, Salvatore Signorino, Rickard Holsmark, Shashi Kumar, Vincenzo Catania
2008	C	`conf`	Efficient Application Specific Routing Algorithms for NoC Systems utilizing Partially Faulty Links. DSD Dario Frazzetta, Giuseppe Dimartino, Maurizio Palesi, Shashi Kumar, Vincenzo Catania
2008	C	`conf`	High Performance Computing for Embedded System Design: A Case Study. DSD Vincenzo Catania, Gianmarco De Francisci Morales, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2008	J	`jnl`	Implementation and Analysis of a New Selection Strategy for Adaptive Routing in Networks-on-Chip. IEEE Trans. Computers Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2008	J	`jnl`	Psychology with soft computing: An integrated approach and its applications. Appl. Soft Comput. Alessandro G. Di Nuovo, Vincenzo Catania, Santo Di Nuovo, Serafino Buono
2008	J	`jnl`	Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems. ACM Trans. Archit. Code Optim. Vincenzo Catania, Maurizio Palesi, Davide Patti
2007	J	`jnl`	Analysis and Tools for the Design of VLIW Embedded Systems in a Multi-Objective Scenario. J. Circuits Syst. Comput. Vincenzo Catania, Maurizio Palesi, Davide Patti
2007	J	`jnl`	Efficient design space exploration for application specific systems-on-a-chip. J. Syst. Archit. Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2007	A	`conf`	Exploiting Communication Concurrency for Efficient Deadlock Free Routing in Reconfigurable NoC Platforms. IPDPS Maurizio Palesi, Shashi Kumar, Rickard Holsmark, Vincenzo Catania
2007	B	`conf`	Multi-Objective Evolutionary Fuzzy Clustering for High-Dimensional Problems. FUZZ-IEEE Alessandro G. Di Nuovo, Maurizio Palesi, Vincenzo Catania
2007	—	`conf`	On External Measures for Validation of Fuzzy Partitions. IFSA (1) Alessandro G. Di Nuovo, Vincenzo Catania
2006	J	`jnl`	A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip. J. Univers. Comput. Sci. Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2006	B	`conf`	A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design. IEEE Congress on Evolutionary Computation Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2006	Misc	`conf`	A methodology for design of application specific deadlock-free routing algorithms for NoC systems. CODES+ISSS Maurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania
2006	—	`conf`	An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design. ICSAMOS Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2006	B	`conf`	An Efficient Approach for the Design of Transparent Fuzzy Rule-Based Classifiers. FUZZ-IEEE Alessandro G. Di Nuovo, Vincenzo Catania
2006	J	`jnl`	An integrated fuzzy-GA approach for buffer management. IEEE Trans. Fuzzy Syst. Giuseppe Ascia, Vincenzo Catania, Daniela Panno
2006	Misc	`conf`	Evolving Fuzzy C-Means: An intelligent technique for efficient diagnosis of children mental retardation level from databases with missing values. IC-AI Alessandro G. Di Nuovo, Vincenzo Catania, Santo Di Nuovo, Serafino Buono
2006	Misc	`conf`	Fuzzy decision making in embedded system design. CODES+ISSS Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania
2006	B	`conf`	Genetic Tuning of Fuzzy Rule Deep Structures for Efficient Knowledge Extraction from Medical Data. SMC Alessandro G. Di Nuovo, Vincenzo Catania
2006	—	`conf`	Neighbors-on-Path: A New Selection Strategy for On-Chip Networks. ESTIMedia Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2005	J	`jnl`	A multiobjective genetic approach for system-level exploration in parameterized systems-on-a-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2005	—	`conf`	A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems. ASP-DAC Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2005	B	`conf`	An evolutionary approach to network-on-chip mapping problem. Congress on Evolutionary Computation Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2005	J	`jnl`	An evolutionary management scheme in high-performance packet switches. IEEE/ACM Trans. Netw. Giuseppe Ascia, Vincenzo Catania, Daniela Panno
2005	—	`conf`	Exploring Design Space of VLIW Architectures. ASAP Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2005	—	`conf`	Hyperblock formation: a power/energy perspective for high performance VLIW architectures. ISCAS (4) Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2004	J	`jnl`	A GA-based design space exploration framework for parameterized system-on-a-chip platforms. IEEE Trans. Evol. Comput. Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2004	—	`conf`	Multi-objective Optimization of a Parameterized VLIW Architecture. Evolvable Hardware Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2004	Misc	`conf`	Multi-objective mapping for mesh-based NoC architectures. CODES+ISSS Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2003	C	`conf`	A Genetic Approach To Bus Encoding. VLSI-SOC Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2003	—	`conf`	A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems. PATMOS Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2003	—	`conf`	An evolutionary approach for reducing the energy in address buses. ISICT Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Antonio Parlato
2003	B	`conf`	An evolutionary approach for reducing the switching activity in address buses. IEEE Congress on Evolutionary Computation Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Antonio Parlato
2003	—	`conf`	EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration. ESTIMedia Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti
2002	—	`conf`	A Framework for Design Space Exploration of Parameterized VLSI Systems. ASP-DAC/VLSI Design Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2002	A*	`conf`	An efficient buffer management policy based on an integrated Fuzzy-GA approach. INFOCOM Giuseppe Ascia, Vincenzo Catania, Daniela Panno
2001	A*	`conf`	A Fuzzy Buffer Management Scheme For ATM and IP Networks. INFOCOM Giuseppe Ascia, Vincenzo Catania, Giuseppe Ficili, Daniela Panno
2001	B	`conf`	A General Purpose Processor Oriented Fuzzy Reasoning. FUZZ-IEEE Giuseppe Ascia, Vincenzo Catania
2001	C	`conf`	An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms. VLSI-SOC Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2001	J	`jnl`	An Instruction-Level Power Analysis Model with Data Dependency. VLSI Design Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Sarta
2001	Misc	`conf`	An adaptive fuzzy threshold scheme for high performance shared-memory switches. SAC Giuseppe Ascia, Vincenzo Catania, Daniela Panno
2001	J	`jnl`	An efficient fuzzy system for traffic management in high-speed packet-switched networks. Soft Comput. Giuseppe Ascia, Vincenzo Catania, Daniela Panno
2001	J	`jnl`	An integrated framework for traffic control in ATM networks based on soft-computing techniques. Inf. Sci. Vincenzo Catania, Giuseppe Ficili, Daniela Panno
2001	—	`conf`	Parameterised system design based on genetic algorithms. CODES Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
2000	B	`conf`	A pipeline parallel architecture for a fuzzy inference processor. FUZZ-IEEE Giuseppe Ascia, Vincenzo Catania
1999	—	`conf`	A Framework for Traffic Control in Integrated Services Networks Based on Fuzzy Logic. Applied Informatics Vincenzo Catania, Giuseppe Ficili, Daniela Panno
1999	—	`conf`	An Optimized Parallel RISC Processor for Fuzzy Computing. Applied Informatics Giuseppe Ascia, Vincenzo Catania
1999	J	`jnl`	On the impact of traffic control algorithms on resource management in ATM networks. Comput. Commun. Vincenzo Catania, Giuseppe Ficili, Daniela Panno
1999	J	`jnl`	VLSI hardware architecture for complex fuzzy systems. IEEE Trans. Fuzzy Syst. Giuseppe Ascia, Vincenzo Catania, Marco Russo
1998	Misc	`conf`	A Framework for a Parallel Architecture Dedicated to Soft Computing. VLSI Design Giuseppe Ascia, Vincenzo Catania
1997	J	`jnl`	A VLSI fuzzy expert system for real-time traffic control in ATM networks. IEEE Trans. Fuzzy Syst. Giuseppe Ascia, Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno
1997	C	`conf`	An assessment of resource exploitation using artificial intelligence based traffic control strategies. ISCC Vincenzo Catania, Giuseppe Ficili, Daniela Panno
1997	J	`jnl`	Applying fuzzy logic to codesign partitioning. IEEE Micro Vincenzo Catania, Michele Malgeri, Marco Russo
1997	Misc	`conf`	Design of a VLSI Hardware PET Decoder. VLSI Design Giuseppe Ascia, Vincenzo Catania, Giuseppe Ficili
1996	J	`jnl`	A Fuzzy Approach to Mapping Problems. Inf. Sci. Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1996	J	`jnl`	A Reconfigurable Parallel Architecture for a Fuzzy Processor. Inf. Sci. Giuseppe Ascia, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1996	J	`jnl`	A comparative analysis of fuzzy versus conventional policing mechanisms for ATM networks. IEEE/ACM Trans. Netw. Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno
1996	J	`jnl`	An Efficient Hardware Architecture to Support Complex Fuzzy Reasoning. Int. J. Artif. Intell. Tools Giuseppe Ascia, Vincenzo Catania
1996	J	`jnl`	An I/O subsystem supporting mass storage functions in parallel systems. Comput. Stand. Interfaces Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita
1996	J	`jnl`	Monitoring performance in distributed systems. Comput. Commun. Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita
1996	—	`conf`	Tuning Hopfield neural network by a fuzzy approach. ICNN Vincenzo Catania, Salvatore Cavalieri, Marco Russo
1996	J	`jnl`	Using fuzzy logic in ATM source traffic control: lessons and perspectives. IEEE Commun. Mag. Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno
1995	C	`conf`	A Framework for Codesign Based on Fuzzy Logic and Genetic Algorithms. IEA/AIE Vincenzo Catania, N. Fiorito, Michele Malgeri, Marco Russo
1995	J	`jnl`	A VLSI Parallel Architecture for Fuzzy Expert Systems. Int. J. Pattern Recognit. Artif. Intell. Vincenzo Catania, Giuseppe Ascia
1995	B	`conf`	A fuzzy decision maker for source traffic control in high speed networks. ICNP Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno
1995	—	`conf`	A soft computing approach to hardware software codesign. Great Lakes Symposium on VLSI Vincenzo Catania, N. Fiorito, Michele Malgeri, Marco Russo
1995	B	`conf`	An efficient hardware architecture to support complex fuzzy reasoning. ICTAI Giuseppe Ascia, Vincenzo Catania
1995	Misc	`conf`	Analog gates for a VLSI fuzzy processor. VLSI Design Vincenzo Catania, Marco Russo
1995	J	`jnl`	Design and Performance Analysis of a Disk Array System. IEEE Trans. Computers Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita
1995	Misc	`conf`	Design of a VLSI parallel processor for fuzzy computing. VLSI Design Giuseppe Ascia, Vincenzo Catania
1995	J	`jnl`	Designing for parallel fuzzy computing. IEEE Micro Giuseppe Ascia, Vincenzo Catania, Biagio Giacalone, Marco Russo, Lorenzo Vita
1995	J	`jnl`	Fuzzy Hardware Challenges. IEEE Micro Abraham Kandel, Giuseppe Ascia, Vincenzo Catania, Biagio Giacalone, Marco Russo, Lorenzo Vita, Andrés Jaramillo-Botero, Yoichi Miyake, Hua Harry Li, Nowell Godfrey, Yuandong Ji, Shuwei Guo, Liliane Peters, Krishna Rao Valavala, Mahmoud A. Manzoul, Antonio Ruiz, Julio Gutiérrez, Felipe Fernández
1994	J	`jnl`	A Simulation Study of DQDB Metropolitan Area Network. Simul. Vincenzo Catania, Aurelio La Corte, Antonio Puliafito, Lorenzo Vita
1994	J	`jnl`	A VLSI fuzzy inference processor based on a discrete analog approach. IEEE Trans. Fuzzy Syst. Vincenzo Catania, Antonio Puliafito, Marco Russo, Lorenzo Vita
1994	J	`jnl`	A remote bridging technique to increase performability in distributed systems. IEEE Trans. Ind. Electron. Salvatore Casale, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1994	A	`conf`	PMT: A Tool to Monitor Performances in Distributed Systems. HPDC Vincenzo Catania, O. Granato, Antonio Puliafito, Lorenzo Vita
1994	A	`conf`	Performance Evaluation of a Partial Dynamic Declustering Disk Array System. HPDC Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita
1994	J	`jnl`	Service integration issues on an ATM DQDB MAN. Comput. Commun. Salvatore Casale, Vincenzo Catania, Aurelio La Corte
1993	J	`jnl`	A Model for Performance Evaluation of Gracefully Degrading Systems. Comput. J. Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1993	J	`jnl`	A modeling framework to evaluate performability parameters in gracefully degrading systems. IEEE Trans. Ind. Electron. Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1993	J	`jnl`	High-speed data service in distributed systems based on SMDS. Comput. Commun. Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1993	J	`jnl`	Service management on an ATM DQDB MAN. Comput. Commun. Salvatore Casale, Vincenzo Catania, Aurelio La Corte, Lorenzo Vita
1991	A*	`conf`	A Routing Strategy for MAN Interconnection. INFOCOM Vincenzo Catania, Mario Gerla, Claudio Pavanelli
1991	B	`conf`	Internetworking data services. LCN Giovanni Marotta, M. Iudica, M. Tiraboschi, Vincenzo Catania, Lorenzo Vita, Andres Albanese, Tasco N. Devetzis, M. W. Maszczak
1991	A	`conf`	Performance analysis of DQDB behaviour with priority levels. ICDCS Vincenzo Catania, L. Mazzola, Antonio Puliafito, Lorenzo Vita
1991	J	`jnl`	Rearrangeable switch fabric for fast packet switching. Comput. Commun. Vincenzo Catania, Salvatore Cavalieri, Lorenzo Vita
1990	A*	`conf`	Availability and Performability Assessment in LAN Interconnection. INFOCOM Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1989	—	`conf`	A Multiple Spanning Tree Protocol in Bridged LANs. IFIP Congress Salvatore Casale, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita
1989	J	`jnl`	Design and performance evaluation of an optical fibre LAN with double token rings. Comput. Commun. Salvatore Casale, Vincenzo Catania, Alberto Faro, Nikolai Parchenkov, Lorenzo Vita
1988	B	`conf`	Fault tolerance increasing in token ring LANs. LCN Salvatore Casale, Vincenzo Catania, Lorenzo Vita