Vinay Sachidananda

37 papers A* 1B 1C 6Misc 1Journal 11Unranked 16
YearRankTypeTitle / Venue / Authors
2026 J jnl
CoRR
Wenbo Guo, Chengwei Liu, Ming Kang, Yiran Zhang, Jiahui Wu, Zhengzi Xu, Vinay Sachidananda, Yang Liu
2025 J jnl
Cybersecur.
Mengmeng Ge, Ruitao Feng, Likun Liu, Xiangzhan Yu, Vinay Sachidananda, Xiaofei Xie, Yang Liu
2025 J jnl
J. Supercomput.
Rajendra Patil, Sivaanandh Muneeswaran, Vinay Sachidananda, Hongyi Peng, Mohan Gurusamy
2024 conf
MIND (2)
Rajendra Shivaji Patil, Ashish Kumar Dwivedi, Vinay Sachidananda
2023 conf
DSC
Vinay Sachidananda, Rajendra Patil, Akshay Sachdeva, Kwok-Yan Lam, Yang Liu
2023 B conf
TrustCom
Vinay Sachidananda, Sivaanandh Muneeswaran, Yang Liu, Kwok-Yan Lam
2023 J jnl
J. Syst. Archit.
Rajendra Patil, Sivaanandh Muneeswaran, Vinay Sachidananda, Mohan Gurusamy
2023 conf
DASC/PiCom/CBDCom/CyberSciTech
Vinay Sachidananda, Bryson Teo, Ruitao Feng, Kwok-Yan Lam, Yang Liu
2023 conf
UbiSec
Vinay Sachidananda, Berwyn Chai, Florian Gondesen, Kwok-Yan Lam, Yang Liu
2023 C conf
PST
Vinay Sachidananda, Rajendra Patil, Hongyi Peng, Yang Liu, Kwok-Yan Lam
2022 C conf
SecureComm
Sivaanandh Muneeswaran, Vinay Sachidananda, Rajendra Patil, Hongyi Peng, Mingchang Liu, Mohan Gurusamy
2022 C conf
PST
Mingchang Liu, Vinay Sachidananda, Hongyi Peng, Rajendra Patil, Sivaanandh Muneeswaran, Mohan Gurusamy
2022 J jnl
Comput. Secur.
Rajendra Patil, Vinay Sachidananda, Hongyi Peng, Akshay Sachdeva, Mohan Gurusamy
2022 C conf
ICICS
Hongyi Peng, Vinay Sachidananda, Teng Joon Lim, Rajendra Patil, Mingchang Liu, Sivaanandh Muneeswaran, Mohan Gurusamy
2022 C conf
ICICS
Mingchang Liu, Vinay Sachidananda, Hongyi Peng, Rajendra Patil, Sivaanandh Muneeswaran, Mohan Gurusamy
2020 J jnl
Comput. Secur.
Yair Meidan, Vinay Sachidananda, Hongyi Peng, Racheli Sagron, Yuval Elovici, Asaf Shabtai
2020 Misc conf
SAC
Vinay Sachidananda, Suhas Bhairav, Yuval Elovici
2019 conf
TrustCom/BigDataSE
Vinay Sachidananda, Suhas Bhairav, Nirnay Ghosh, Yuval Elovici
2019 J jnl
CoRR
Yair Meidan, Vinay Sachidananda, Yuval Elovici, Asaf Shabtai
2019 J jnl
IEEE Trans. Reliab.
Shachar Siboni, Vinay Sachidananda, Yair Meidan, Michael Bohadana, Yael Mathov, Suhas Bhairav, Asaf Shabtai, Yuval Elovici
2019 J jnl
IEEE Internet Things J.
Nirnay Ghosh, Saket Chandra, Vinay Sachidananda, Yuval Elovici
2019 J jnl
EAI Endorsed Trans. Security Safety
Vinay Sachidananda, Suhas Bhairav, Yuval Elovici
2018 conf
SecureComm (1)
Suhas Setikere, Vinay Sachidananda, Yuval Elovici
2018 C conf
CRITIS
Neeraj Karamchandani, Vinay Sachidananda, Suhas Setikere, Jianying Zhou, Yuval Elovici
2017 conf
IoTPTS@AsiaCCS
Vinay Sachidananda, Shachar Siboni, Asaf Shabtai, Jinghui Toh, Suhas Bhairav, Yuval Elovici
2016 A* conf
CCS
Vinay Sachidananda, Jinghui Toh, Shachar Siboni, Asaf Shabtai, Yuval Elovici
2016 J jnl
CoRR
Shachar Siboni, Vinay Sachidananda, Asaf Shabtai, Yuval Elovici
2015 conf
ISSNIP
Vinay Sachidananda, David Noack, Abdelmajid Khelil, Kristof Van Laerhoven, Philipp M. Scholl
2014
Vinay Sachidananda
2013 conf
WMNC
Vinay Sachidananda, Abdelmajid Khelil, David Noack, Neeraj Suri
2013 conf
WONS
Vinay Sachidananda, Abdelmajid Khelil, David Noack, Neeraj Suri
2013 conf
ICNSC
Vinay Sachidananda, Abdelmajid Khelil, Dhananjay Umap, Matthias Majuntke, Neeraj Suri
2012 conf
INSS
Philipp M. Scholl, Stefan Kohlbrecher, Vinay Sachidananda, Kristof Van Laerhoven
2010 conf
AlgoSyn
Vinay Sachidananda
2010 conf
ICIQ
Vinay Sachidananda, Abdelmajid Khelil, Neeraj Suri
2010 conf
SIMPAR
Vinay Sachidananda, Diego Costantini, Christian Reinl, A. Dominik Haumann, Karen Petersen, Parag S. Mogre, Abdelmajid Khelil
2008 conf
IWSOS
Andrey Somov, Vinay Sachidananda, Roberto Passerone
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False