Vinay C. Patil

26 papers C 1Misc 2Journal 6Unranked 17
YearRankTypeTitle / Venue / Authors
2022 — conf
Combination Frequency Differencing for Identifying Design Weaknesses in Physical Unclonable Functions.
ICST Workshops
D. Richard Kuhn, M. S. Raunak, Charles B. Prado, Vinay C. Patil, Raghu N. Kacker
2022 J jnl
Realizing Robust, Lightweight Strong PUFs for Securing Smart Grids.
IEEE Trans. Consumer Electron.
Vinay C. Patil, Sandip Kundu
2021 J jnl
Preventing DNN Model IP Theft via Hardware Obfuscation.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Brunno F. Goldstein, Vinay C. Patil, Victor da Cruz Ferreira, Alexandre Solon Nery, Felipe M. G. França, Sandip Kundu
2020 — conf
On Leveraging Multi-threshold FinFETs for Design Obfuscation.
ISVLSI
Vinay C. Patil, Sandip Kundu
2019 J jnl
Design of Robust, High-Entropy Strong PUFs via Weightless Neural Network.
J. Hardw. Syst. Secur.
Leandro Santiago de Araújo, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu
2019 — conf
Efficient Testing of Physically Unclonable Functions for Uniqueness.
ATS
Leandro Santiago de Araújo, Vinay C. Patil, Leandro Augusto Justen Marzulo, Felipe Maia Galvão França, Sandip Kundu
2019 J jnl
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device- and Logic-Level Techniques.
CoRR
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
2018 — conf
Defeating Strong PUF Modeling Attack via Adverse Selection of Challenge-Response Pairs.
AsianHOST
Horacio L. França, Charles B. Prado, Vinay C. Patil, Sandip Kundu
2018 J jnl
On Enhancing Reliability of Weak PUFs via Intelligent Post-Silicon Accelerated Aging.
IEEE Trans. Circuits Syst. I Regul. Pap.
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
2018 — conf
On IC traceability via blockchain.
VLSI-DAT
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
2017 C conf
A guide to graceful aging: How not to overindulge in post-silicon burn-in for enhancing reliability of weak PUF.
ISCAS
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
2017 — conf
Determining proximal geolocation of IoT edge devices via covert channel.
ISQED
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
2017 — conf
Improving reliability of weak PUFs via circuit techniques to enhance mismatch.
HOST
Vinay C. Patil, Arunkumar Vijayakumar, Daniel E. Holcomb, Sandip Kundu
2017 — conf
Peer pressure on identity: On requirements for disambiguating PUFs in noisy environment.
NATW
Pavithra Ramesh, Vinay C. Patil, Sandip Kundu
2017 J jnl
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device and Logic-Level Techniques.
IEEE Trans. Inf. Forensics Secur.
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
2017 — conf
Realizing strong PUF from weak PUF via neural computing.
DFT
Leandro Santiago, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu
2016 Misc conf
An Efficient Method for Clock Skew Scheduling to Reduce Peak Current.
VLSID
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
2016 — conf
Machine learning resistant strong PUF: Possible or a pipe dream?
HOST
Arunkumar Vijayakumar, Vinay C. Patil, Charles B. Prado, Sandip Kundu
2016 — conf
On meta-obfuscation of physical layouts to conceal design characteristics.
DFT
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
2016 — conf
On testing physically unclonable functions for uniqueness.
ISQED
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
2016 — conf
Preventing integrated circuit piracy via custom encoding of hardware instruction set.
ISQED
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
2014 — conf
On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery.
ISVLSI
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
2014 — conf
On pattern generation for maximizing IR drop.
ISQED
Arunkumar Vijayakumar, Vinay C. Patil, Girish Paladugu, Sandip Kundu
2013 Misc conf
Impact of Clock-Gating on Power Distribution Network Using Wavelet Analysis.
VLSI Design
Vinay C. Patil, Sudarshan Srinivasan, Wayne P. Burleson, Sandip Kundu
2012 — conf
On Design of Temperature Invariant Physically Unclonable Functions Based on Ring Oscillators.
ISVLSI
Raghavan Kumar, Vinay C. Patil, Sandip Kundu
2011 — conf
Design of Unique and Reliable Physically Unclonable Functions Based on Current Starved Inverter Chain.
ISVLSI
Raghavan Kumar, Vinay C. Patil, Sandip Kundu