Vikas Mahor

11 papers Journal 4Unranked 7
YearRankTypeTitle / Venue / Authors
2019 — conf
Image Filtering with Iterative Wavelet Transform Based Compression.
ICACDS (2)
Vikas Mahor, Srishti Agrawal, Rekha Gupta
2018 — conf
A Highly Accurate Fire Detection Method Using Discriminate Method.
ICACCI
Shubhranil Kundu, Vikas Mahor, Rekha Gupta
2018 J jnl
A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design.
Circuits Syst. Signal Process.
Vikas Mahor, Manisha Pattanaik
2017 J jnl
An Aging-Aware Reliable FinFET-Based Low-Power 32-Word \(\times \) 32-bit Register File.
Circuits Syst. Signal Process.
Vikas Mahor, Manisha Pattanaik
2016 — conf
FinFET-Based Low Power Address Decoder under Process Variation.
iNIS
Mukesh Chaturvedi, Akanksha Bhadoria, Vikas Mahor, Manisha Pattanaik
2016 — conf
Low Stand-By Power and Process Variation Tolerant FinFET Based SRAM Cell.
iNIS
Akanksha Bhadoria, Mukesh Chaturvedi, Vikas Mahor, Manisha Pattanaik
2016 — conf
Novel Ultra Low Leakage FinFET Based SRAM Cell.
iNIS
Vivek Kumar, Vikas Mahor, Manisha Pattanaik
2015 J jnl
Low Leakage and Highly Noise Immune FinFET-Based Wide Fan-In Dynamic Logic Design.
J. Circuits Syst. Comput.
Vikas Mahor, Manisha Pattanaik
2015 J jnl
Novel NBTI Aware Approach for Low Power FinFET Based Wide Fan-In Domino Logic.
J. Low Power Electron.
Vikas Mahor, Manisha Pattanaik
2012 — conf
A Process Variation Tolerant Low Contention Keeper Design for Wide Fan-In Dynamic OR Gate.
ISED
Vikas Mahor, Akanksha Chouhan, Manisha Pattanaik
2011 — conf
A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique.
ISED
Manisha Pattanaik, Shashank Parashar, Chaudhry Indra Kumar, Akanksha Chouhan, Vikas Mahor