Viji Srinivasan

26 papers A* 6A 4B 1Journal 7Unranked 8

Year	Rank	Type	Title / Venue / Authors
2026	A	`conf`	Eliminating Redundancy: Ultra-compact Code Generation for Programmable Dataflow Accelerators. CGO Prasanth Chatarasi, Alex Gatea, Bardia Mahjour, Jintao Zhang, Alberto Mannari, Chris Bowler, Shubham Jain, Masoud Ataei Jaliseh, Nicole Khoun, Kamlesh Kumar, Viji Srinivasan, Swagath Venkataramani
2026	A	`conf`	Enabling Spill-Free Compilation via Affine-Based Live Range Reduction Optimization. CGO Prasanth Chatarasi, Alex Gatea, Wei Wang, Chris Bowler, Shubham Jain, Masoud Ataei Jaliseh, Nicole Khoun, Alberto Mannari, Bardia Mahjour, Viji Srinivasan, Swagath Venkataramani
2026	J	`jnl`	Is Finer Better? The Limits of Microscaling Formats in Large Language Models. CoRR Andrea Fasoli, Monodeep Kar, Chi-Chun (Charlie) Liu, Swagath Venkataramani, Viji Srinivasan, Leland Chang, Naigang Wang
2026	—	`conf`	Spyre: An Inference-Optimized Scalable AI Accelerator for Enterprise Workloads. ISSCC Matthew Cohen, Monodeep Kar, Swagath Venkataramani, Viji Srinivasan, Brian Veraa, Matthew M. Ziegler, Nianzheng Cao, Ashish Ranjan, Joel Silberman, Michael Guillorn, Sandra Woodward, JohnDavid Lancaster, Josh Hursey, Kyu-Hyoun Kim, Alberto Mannari, Amrit Nagarajan, Ananda Samajdar, Bahman Hekmatshoartabari, Bob Galbraith, Ching Zhou, David L. Satterfield, Gregory S. Still, Gustavo Tellez, Indira Nair, Indu Masilamanai, Jinwook Jung, Kavi Randhawa, Marcel Schaal, Martin Lutz, Paul Crumley, Philip Jacob, Prasanth Chatarasi, Radhika Jain, Sae Kyu Lee, Sanchari Sen, Sarada Krithivasan, Scot Rider, Shubham Jain, Siyu Koswatta, Thomas Roewer, Tom Gooding, Victor Ferrari, Vidhi Zalani, Zhibin Ren, Kevin Reick, Lisa Maurice, Christopher J. Gonzalez, Chris Catalino, Ryan Nett, Pong-Fei Lu, Robert M. Senger, Leland Chang
2025	J	`jnl`	Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC. IEEE J. Solid State Circuits Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Röwer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang
2024	—	`conf`	14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC. ISSCC Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Roewer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang
2022	J	`jnl`	OnSRAM: Efficient Inter-Node On-Chip Scratchpad Management in Deep Learning Accelerators. ACM Trans. Embed. Comput. Syst. Subhankar Pal, Swagath Venkataramani, Viji Srinivasan, Kailash Gopalakrishnan
2021	B	`conf`	Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators. ISPASS Subhankar Pal, Swagath Venkataramani, Viji Srinivasan, Kailash Gopalakrishnan
2018	A	`conf`	Exploiting approximate computing for deep learning acceleration. DATE Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Viji Srinivasan, Swagath Venkataramani
2017	A*	`conf`	Accelerator Design for Deep Learning Training: Extended Abstract: Invited. DAC Ankur Agrawal, Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Jinwook Oh, Sunil Shukla, Viji Srinivasan, Swagath Venkataramani, Wei Zhang
2012	A*	`conf`	Efficient scrub mechanisms for error-prone emerging memories. HPCA Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viji Srinivasan
2007	—	`conf`	An analysis of the effects of miss clustering on the cost of a cache miss. Conf. Computing Frontiers Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan, Jim Mitchell
2007	—	`conf`	Pipeline spectroscopy. Experimental Computer Science Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan, Arthur Nadas
2007	A*	`conf`	Pipeline spectroscopy. SIGMETRICS Thomas R. Puzak, Allan Hartstein, Viji Srinivasan, Philip G. Emma, Arthur Nadas
2006	—	`conf`	Cache miss behavior: is it sqrt(2)? Conf. Computing Frontiers Allan Hartstein, Viji Srinivasan, Thomas R. Puzak, Philip G. Emma
2005	J	`jnl`	Exploring the limits of prefetching. IBM J. Res. Dev. Philip G. Emma, Allan Hartstein, Thomas R. Puzak, Viji Srinivasan
2005	—	`conf`	When prefetching improves/degrades performance. Conf. Computing Frontiers Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan
2004	J	`jnl`	A Prefetch Taxonomy. IEEE Trans. Computers Viji Srinivasan, Edward S. Davidson, Gary S. Tyson
2004	J	`jnl`	Integrated Analysis of Power and Performance for Pipelined Microprocessors. IEEE Trans. Computers Victor V. Zyuban, David M. Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma
2004	A	`conf`	Microarchitectural techniques for power gating of execution units. ISLPED Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose
2003	—	`conf`	Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches. PACS Rajeev Balasubramonian, Viji Srinivasan, Sandhya Dwarkadas, Alper Buyuktosunoglu
2003	J	`jnl`	New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors. IBM J. Res. Dev. David M. Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield
2002	—	`conf`	Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS Pradip Bose, David M. Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas
2002	A*	`conf`	Optimizing pipelines for power and performance. MICRO Viji Srinivasan, David M. Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma
2001	A*	`conf`	Branch History Guided Instruction Prefetching. HPCA Viji Srinivasan, Edward S. Davidson, Gary S. Tyson, Mark J. Charney, Thomas R. Puzak
1997	A*	`conf`	Towards a Communication Characterization Methodology for Parallel Applications. HPCA Sucheta Chodnekar, Viji Srinivasan, Aniruddha S. Vaidya, Anand Sivasubramaniam, Chita R. Das