Vijay Shankar Pasupureddi

13 papers C 6Journal 4Unranked 3
YearRankTypeTitle / Venue / Authors
2025 C conf
350-fJ/spike, 30-Hz Bio-inspired Silicon Neuron Circuit in 0.2 V, 65 nm CMOS.
ISCAS
Sivaiah Naali, Srikanth Vuppunuthala, Vijay Shankar Pasupureddi
2025 J jnl
A 0.0375-pJ/bit Charge-Steering Based Hybrid for 8-Gb/s/pin Full-Duplex Chip-to-Chip Interconnects in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Prema Kumar Govindaswamy, Nijwm Wary, Vijay Shankar Pasupureddi
2025 C conf
A ±0.6 dB, 256-μW Digital-Intensive RSSI with 80-dB Dynamic-Range in 65-nm CMOS.
ISCAS
Sivaiah Naali, Ravi Prakash Bisen, Raviteja Kammari, Vijay Shankar Pasupureddi
2025 C conf
Breaking the Trade-off Between Input Impedance and Mixer Paths in Sub-Harmonic N-Path Mixer-First RF Front-end.
ISCAS
Raviteja Kammari, Vijay Shankar Pasupureddi
2024 J jnl
3.6-pJ/Spike, 30-Hz Silicon Neuron Circuit in 0.5-V, 65-nm CMOS for Spiking Neural Networks.
IEEE Trans. Circuits Syst. II Express Briefs
Srikanth Vuppunuthala, Vijay Shankar Pasupureddi
2024 — conf
A 0.186 pJ/bit, 6-Gb/s, Energy-Efficient, Half-Rate Hybrid Circuit Topology in 1.2V, 65 nm CMOS.
ISQED
Prema Kumar Govindaswamy, Mursina Khatun, Vijay Shankar Pasupureddi
2024 C conf
A 0.2 pJ/bit, Energy-Efficient, Half-Rate Hybrid Circuit Topology at 6-Gb/s in 1.2V, 65 nm CMOS.
ISCAS
Prema Kumar Govindaswamy, Mursina Khatun, Vijay Shankar Pasupureddi
2024 J jnl
A 0.4-1.8-GHz Quarter-Rate Subsampling Mixer-First Direct Down-Conversion RF Front-End.
IEEE Trans. Very Large Scale Integr. Syst.
Rakesh Varma Rena, Raviteja Kammari, Vijay Shankar Pasupureddi
2024 — conf
A 1.2 V Double-Tail StrongARM Latch Comparator with 51 fJ/comparison and 380 μV Input Noise in 65 nm CMOS Technology.
ISQED
Srinivasa Rao Maram, Subrahmanyam Boyapati, Vijay Shankar Pasupureddi
2024 C conf
A 15-Gb/s, 0.036 pJ/bit, Half-Rate, Low Power PRBS Generator in 1.2 V, 65 nm CMOS.
ISCAS
Perakalapudi Ravibabu, Prema Kumar Govindaswamy, Vijay Shankar Pasupureddi
2024 C conf
A 2
ISCAS
Prema Kumar Govindaswamy, Mursina Khatun, Vijay Shankar Pasupureddi
2023 J jnl
0.4-1 GHz Subsampling Mixer-First RF Front-End With 50-dB HRR, +10-dBm IB-IIP3 in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Rakesh Varma Rena, Raviteja Kammari, Vijay Shankar Pasupureddi
2023 — conf
A 1-6 GHz, Sub-mW Self-Aligned Quadrature Phase Clock Generator in 1.2 V, 65 nm CMOS.
APCCAS
Raviteja Kammari, Sarvesh Rajesh Tuckely, Vijay Shankar Pasupureddi