Vijay Pitchumani

35 papers A* 7A 3C 4Misc 1Journal 10Unranked 10

Year	Rank	Type	Title / Venue / Authors
2013	—	`conf`	How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core. CICC Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim
2010	A*	`conf`	Who solves the variability problem? DAC Nagaraj Ns, Juan C. Rey, Jamil Kawa, Robert C. Aitken, Christian Lütkemeyer, Vijay Pitchumani, Andrzej J. Strojwas, Steve Trimberger
2007	J	`jnl`	Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng
2006	—	`conf`	A Hitchhiker's Guide to the DFM Universe. APCCAS Vijay Pitchumani
2006	J	`jnl`	Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration. ACM Trans. Design Autom. Electr. Syst. Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani
2006	J	`jnl`	Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng
2006	—	`conf`	Integrating dynamic thermal via planning with 3D floorplanning algorithm. ISPD Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng
2006	A*	`conf`	Variation-aware analysis: savior of the nanometer era? DAC Sani R. Nassif, Vijay Pitchumani, Norma Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic
2005	—	`conf`	A divide-and-conquer 2.5-D floorplanning algorithm based on statistical wirelength estimation. ISCAS (6) Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannal Yang, Prashant Saxena, Vijay Pitchumani
2005	—	`conf`	Embedded tutorial I: design for manufacturability. ASP-DAC Vijay Pitchumani
2005	—	`conf`	Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies? ASP-DAC Chung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen
1999	J	`jnl`	Multi-schedule design space exploration: an alternative synthesis framework. Integr. Mehmet Emin Dalkiliç, Vijay Pitchumani
1995	C	`conf`	ANSA: A New Neural Net Based Scheduling Algorithm for High Level Synthesis. ISCAS M. Kemal Unaltuna, Vijay Pitchumani
1994	C	`conf`	A Multi-Schedule Approach to High-Level Synthesis. ICCD Mehmet Emin Dalkiliç, Vijay Pitchumani
1994	C	`conf`	A Stochastic Reward & Punishment Neural Network Algorithm for Circuit Bipartitioning. ISCAS M. Kemal Unaltuna, Vijay Pitchumani
1994	—	`conf`	Distributed data-path synthesis on a network of workstations. Great Lakes Symposium on VLSI Mehmet Emin Dalkiliç, Vijay Pitchumani
1994	Misc	`conf`	HSIM1 and HSIM2: Object Oriented Algorithms for VHDL Simulation. VLSI Design Neeta Ganguly, Vijay Pitchumani
1994	—	`conf`	Optimal Operation Scheduling Using Resource Lower Bound Estimations. EDAC-ETC-EUROASIC Mehmet Emin Dalkiliç, Vijay Pitchumani
1993	C	`conf`	Quadrisectioning Based Placement with a Normalized Mean Field Neural Network. ISCAS M. Kemal Unaltuna, Vijay Pitchumani
1993	—	`conf`	Solving the scheduling problem in high level synthesis using a normalized mean field neural network. ICNN M. Kemal Unaltuna, Mehmet Emin Dalkiliç, Vijay Pitchumani
1992	J	`jnl`	A VHDL Fault Diagnosis Tool Using Functional Fault Models. IEEE Des. Test Comput. Vijay Pitchumani, Pankaj Mayor, Nimish Radia
1992	J	`jnl`	Fault simulation on massively parallel SIMD machines algorithms, implementations and results. J. Electron. Test. Vinod Narayanan, Vijay Pitchumani
1991	A*	`conf`	A System for Fault Diagnosis and Simulation of VHDL Descriptions. DAC Vijay Pitchumani, Pankaj Mayor, Nimish Radia
1991	A	`conf`	Fault Diagnosis using Functional Fault Models for VHDL descriptions. ITC Vijay Pitchumani, Pankaj Mayor, Nimish Radia
1989	A*	`conf`	A Massively Parallel Algorithm for Fault Simulation on the Connection Machine. DAC Vinod Narayanan, Vijay Pitchumani
1989	A*	`conf`	Compaction of a Routed Channel on the Connection Machine. DAC Shantanu Ganguly, Vijay Pitchumani
1989	A	`conf`	Restricted symbolic evaluation is fast and useful. ICCAD J. Lawrence Carter, Barry K. Rosen, Gordon L. Smith, Vijay Pitchumani
1988	A	`conf`	: A Parallel Algorithm for Fault Simulation on the Connection Machine. ITC Vinod Narayanan, Vijay Pitchumani
1988	J	`jnl`	Functional Test Generation Based on Unate Function Theory. IEEE Trans. Computers Vijay Pitchumani, Satish S. Soman
1987	J	`jnl`	A Mixed HVH-VHV Algorithm for Three-Layer Channel Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vijay Pitchumani, Qisui Zhang
1985	—	`conf`	An Experiment in Programming with Full First-Order Logic. SLP Zerksis D. Umrigar, Vijay Pitchumani
1985	J	`jnl`	Verification of Register Transfer Level Parallel Control Sequences. IEEE Trans. Computers Vijay Pitchumani, Edward P. Stabler
1983	J	`jnl`	An Inductive Assertion Method for Register Transfer Level Design Verification. IEEE Trans. Computers Vijay Pitchumani, Edward P. Stabler
1983	A*	`conf`	Formal verification of a real-time hardware design. DAC Zerksis D. Umrigar, Vijay Pitchumani
1982	A*	`conf`	A formal method for computer design verification. DAC Vijay Pitchumani, Edward P. Stabler