Viera Stopjaková

111 papers A 3C 48Journal 25Unranked 34

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Development of slope detection ASIC for on-chip current sensing in voltage converters. Integr. Richard Ravasz, Viera Stopjaková, David Maljar, Daniel Arbet, Lukás Nagy, Martin Kovác
2025	C	`conf`	Tunable Voltage Reference circuit in a standard 65nm CMOS technology. DDECS Róbert Ondica, David Maljar, Miroslav Potocný, Daniel Arbet, Viera Stopjaková
2024	C	`conf`	Constant Voltage Maximum Power Point Tracking Method for Fully Integrated Solar-Powered Energy Harvester. DDECS Adam Hudec, Róbert Ondica, Richard Ravasz, Viera Stopjaková
2023	J	`jnl`	0.3-V, 357.4-nW Voltage-Mode First-Order Analog Filter Using a Multiple-Input VDDDA. IEEE Access Fabian Khateb, Montree Kumngern, Tomasz Kulej, Viera Stopjaková, Costas Psychalinos
2023	—	`conf`	Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. AFRICON Lukás Nagy, Michal Sovcik, Viera Stopjaková
2023	—	`conf`	Design of the Slope Detection Circuit for On-Chip Current Sensing. MIXDES Richard Ravasz, David Maljar, Daniel Arbet, Viera Stopjaková, Peter Kubinec
2023	—	`conf`	Low-Power CMOS Frequency Comparator. MIPRO Martin Kovác, Miroslav Potocný, Daniel Arbet, Róbert Ondica, Richard Ravasz, Viera Stopjaková
2022	J	`jnl`	0.5 V, nW-Range Universal Filter Based on Multiple-Input Transconductor for Biosignals Processing. Sensors Fabian Khateb, Montree Kumngern, Tomasz Kulej, Meysam Akbari, Viera Stopjaková
2022	J	`jnl`	A 0.3-V High Linear Rail-to-Rail Bulk-Driven OTA in 0.13 μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Tomasz Kulej, Fabian Khateb, Daniel Arbet, Viera Stopjaková
2022	C	`conf`	Autocalibration Approach for Improving Robustness of Analog ICs. DDECS David Maljar, Daniel Arbet, Martin Kovác, Róbert Ondica, Viera Stopjaková
2022	—	`conf`	High Power Supply Rejection LDO Regulator for Switching Applications. MIPRO Daniel Arbet, Martin Kovác, David Maljas, Lukás Nagy, Viera Stopjaková
2022	—	`conf`	Histogram memory reduction in FPGA gradient edge detectors. MECO Miroslav Hagara, Oldrich Ondrácek, Viera Stopjaková, Radovan Stojanovic
2022	—	`conf`	Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. RADIOELEKTRONIKA Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2022	C	`conf`	On-Chip Current Sensing Approaches for DC-DC Converters. DDECS Richard Ravasz, Adam Hudec, Daniel Arbet, Viera Stopjaková
2021	C	`conf`	EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2021	—	`conf`	EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. AFRICON Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Róbert Ondica, Viera Stopjaková
2021	C	`conf`	Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration. DDECS David Maljar, Michal Sovcík, Daniel Arbet, Viera Stopjaková
2021	—	`conf`	Fully On-Chip Low-Drop Regulator for Low-Power Applications. MIPRO Daniel Arbet, Miroslav Potocný, Martin Kovác, Lukás Nagy, Viera Stopjaková
2021	—	`conf`	Investigation of Inductor-based Fully On-chip Boost Converter. MIXDES Róbert Ondica, Daniel Arbet, Martin Kovác, Viera Stopjaková
2021	J	`jnl`	Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. Sensors Miroslav Potocný, Martin Kovác, Daniel Arbet, Michal Sovcik, Lukás Nagy, Viera Stopjaková, Richard Ravasz
2021	J	`jnl`	Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. CoRR Adam Hudec, Lukás Nagy, Martin Kovác, Viera Stopjaková
2021	J	`jnl`	RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. CoRR Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2021	J	`jnl`	The Concept of Advanced Multi-Sensor Monitoring of Human Stress. Sensors Erik Vavrinsky, Viera Stopjaková, Martin Kopani, Helena Kosnácová
2020	—	`ed.`	30th International Conference Radioelektronika, RADIOELEKTRONIKA 2020, Bratislava, Slovakia, April 15-16, 2020 RADIOELEKTRONIKA Lukás Nagy, Viera Stopjaková
2020	—	`conf`	ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems. MIXDES Lukás Kohútka, Viera Stopjaková
2020	—	`conf`	Autonomous On-Chip Digital Calibration for Analog ICs in Nanotechnologies. RADIOELEKTRONIKA Michal Sovcík, Viera Stopjaková, Daniel Arbet, Miroslav Potocný
2020	—	`conf`	Development of test equipment for evaluation of low-power AC/DC converter ASIC. RADIOELEKTRONIKA Miroslav Potocný, Michal Sovcík, Viera Stopjaková
2020	C	`conf`	Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2020	—	`conf`	Low-Leakage ESD Structures in 130nm CMOS Technology. RADIOELEKTRONIKA Lukás Nagy, Ales Chvála, Viera Stopjaková
2020	—	`conf`	Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. MIPRO Martin Kovác, Daniel Arbet, Lukás Nagy, Michal Sovcik, Viera Stopjaková
2020	J	`jnl`	Novel efficient on-chip task scheduler for multi-core hard real-time systems. Microprocess. Microsystems Lukás Kohútka, Viera Stopjaková
2020	—	`conf`	RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. MECO Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2019	—	`conf`	A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks. MECO Lukás Kohútka, Viera Stopjaková
2019	J	`jnl`	A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. J. Circuits Syst. Comput. Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2019	C	`conf`	High side power MOSFET switch driver for a low-power AC/DC converter. DDECS Miroslav Potocný, Juraj Brenkus, Viera Stopjaková
2019	A	`conf`	International Symposium on Design and Diagnostics of Electronic Circuits and Systems. ITC Zoran Stamenkovic, Alberto Bosio, György Cserey, Ondrej Novák, Witold A. Pleskacz, Lukás Sekanina, Andreas Steininger, Goran Stojanovic, Viera Stopjaková
2019	C	`conf`	Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. DDECS Martin Kovác, Daniel Arbet, Viera Stopjaková, Michal Sovcik, Lukás Nagy
2019	C	`conf`	Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. DDECS Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2019	—	`conf`	Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. AFRICON Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
2019	—	`conf`	Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. MIXDES Viera Stopjaková, Martin Kovác, Daniel Arbet, Lukás Nagy
2019	C	`conf`	Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková
2019	—	`conf`	Voltage-to-Frequency Converter for Ultra-Low-Voltage Applications. MIPRO Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný
2018	C	`conf`	A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. DSD Lukás Kohútka, Lukás Nagy, Viera Stopjaková
2018	—	`conf`	A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. DTIS Lukás Kohútka, Viera Stopjaková
2018	—	`conf`	Bulk-driven fully differential difference amplifier for ultra-low voltage applications. MIPRO Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný
2018	C	`conf`	Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. DDECS Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková
2018	C	`conf`	Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. DDECS Lukás Kohútka, Viera Stopjaková
2018	J	`jnl`	Reliable real-time task scheduler based on Rocket Queue architecture. Microelectron. Reliab. Lukás Kohútka, Viera Stopjaková
2018	C	`conf`	Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices. DDECS Miroslav Potocný, Viera Stopjaková, Martin Kovác
2018	C	`conf`	Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. DDECS Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik
2018	J	`jnl`	Ultra-low-voltage boosted driver for self-powered systems. Microelectron. Reliab. Michal Sovcik, Martin Kovác, Daniel Arbet, Viera Stopjaková, Miroslav Potocný
2017	J	`jnl`	130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. J. Circuits Syst. Comput. Daniel Arbet, Viera Stopjaková, Martin Kovác, Lukás Nagy, Matej Rakus, Michal Sovcik
2017	J	`jnl`	A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. J. Circuits Syst. Comput. Juraj Brenkus, Viera Stopjaková, Viera Cernanová, Daniel Arbet, Lukás Nagy, Vladimír Sedlák
2017	—	`conf`	A new efficient sorting architecture for real-time systems. MECO Lukás Kohútka, Viera Stopjaková
2017	J	`jnl`	Foreword. J. Circuits Syst. Comput. Andreas Steininger, Adam Pawlak, Viera Stopjaková
2017	—	`conf`	Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. AFRICON Lukás Nagy, Daniel Arbet, Martin Kovác, Viera Stopjaková
2017	C	`conf`	Rocket Queue: New data sorting architecture for real-time systems. DDECS Lukás Kohútka, Viera Stopjaková
2017	C	`conf`	Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology. DDECS Michal Sovcik, Martin Kovác, Daniel Arbet, Viera Stopjaková
2016	C	`conf`	CMOS variable-gain amplifier for low-frequency applications. DDECS Michal Sovcik, Michal Matuska, Daniel Arbet, Viera Stopjaková
2016	C	`conf`	Comparison of gate-driven and bulk-driven current mirror topologies. DDECS Matej Rakus, Viera Stopjaková, Daniel Arbet
2016	J	`jnl`	Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications. J. Circuits Syst. Comput. Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková
2016	C	`conf`	Impedance calculation based method for AC fault analysis of mixed-signal circuits. DDECS Juraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet
2016	C	`conf`	Improved Task Scheduler for Dual-Core Real-Time Systems. DSD Lukás Kohútka, Viera Stopjaková
2016	C	`conf`	Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. DDECS Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus
2016	—	`conf`	Task scheduler for dual-core real-time systems. MIXDES Lukás Kohútka, Viera Stopjaková
2016	—	`conf`	Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. MIPRO Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik
2015	C	`conf`	Design of In AlN/GaN Heterostructure-Based Logic Cells. DDECS Lukás Nagy, Viera Stopjaková, Alexander Satka
2015	C	`conf`	Fully Differential Difference Amplifier for Low-Noise Applications. DDECS Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková
2015	J	`jnl`	Investigation of the optimum oscillation frequency value towards increasing the efficiency of OBIST approach. Microelectron. Reliab. Daniel Arbet, Viera Stopjaková, Martin Kovác
2015	—	`conf`	Readout interface for capacitive MEMS microphone in CMOS technology. MIXDES Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková, Lukás Nagy
2014	J	`jnl`	A new I Microprocess. Microsystems Gábor Gyepes, Viera Stopjaková, Daniel Arbet, Libor Majer, Juraj Brenkus
2014	C	`conf`	A novel impedance calculation method and its time efficiency evaluation. DDECS Juraj Brenkus, Viera Stopjaková, Daniel Arbet, Gábor Gyepes, Libor Majer
2014	C	`conf`	An approach towards selection of the oscillation frequency for oscillation test of analog ICs. DDECS Martin Kovác, Daniel Arbet, Gabriel Nagy, Viera Stopjaková
2014	J	`jnl`	BIST architecture for oscillation test of analog ICs and investigation of test hardware influence. Microelectron. Reliab. Daniel Arbet, Viera Stopjaková, Juraj Brenkus, Gábor Gyepes, Martin Kovác, Libor Majer
2014	J	`jnl`	Current Sensing Completion Detection in Single-Rail Asynchronous Systems. Comput. Informatics Lukás Nagy, Viera Stopjaková, Juraj Brenkus
2014	A	`conf`	Novel architecture of a digital neuron for FFNN employing special multiplication. ECAI Roman Záluský, Daniela Duracková, Viera Stopjaková, Lukás Nagy, Vladimír Sedlák
2013	J	`jnl`	Completion detection in dual-rail asynchronous systems by current-sensing. Microelectron. J. Lukás Nagy, Viera Stopjaková, Roman Záluský
2013	C	`conf`	Digital methods of offset compensation in 90nm CMOS operational amplifiers. DDECS Gabriel Nagy, Daniel Arbet, Viera Stopjaková
2013	C	`conf`	Efficiency of oscillation-based BIST in 90nm CMOS active analog filters. DDECS Daniel Arbet, Gabriel Nagy, Viera Stopjaková, Gábor Gyepes
2013	C	`conf`	Numerical method for DC fault analysis simplification and simulation time reduction. DDECS Juraj Brenkus, Viera Stopjaková, Gábor Gyepes
2012	C	`conf`	Application of IDDT test towards increasing SRAM reliability in nanometer technologies. DDECS Gábor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjaková
2012	C	`conf`	Current sensing completion detection in dual-rail asynchronous systems. DDECS Lukás Nagy, Viera Stopjaková
2012	C	`ed.`	IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012 DDECS Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A. Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin
2012	C	`conf`	OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters. DDECS Daniel Arbet, Gábor Gyepes, Juraj Brenkus, Viera Stopjaková
2011	—	`conf`	Alternative methods for heart-rate sensing. ISABEL Erik Vavrinsky, Martin Daricek, Martin Donoval, Peter Telek, Viera Stopjaková, Vladimir Tvarozek
2011	C	`conf`	Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies. DDECS Gábor Gyepes, Juraj Brenkus, Daniel Arbet, Viera Stopjaková
2011	C	`conf`	Current sensing methodology for completion detection in self-timed systems. DDECS Lukás Nagy, Viera Stopjaková
2011	C	`conf`	Increasing the efficiency of analog OBIST using on-chip compensation of technology variations. DDECS Daniel Arbet, Juraj Brenkus, Gábor Gyepes, Viera Stopjaková
2010	C	`conf`	Current Sensing Completion Detection in deep sub-micron technologies. DDECS Lukás Nagy, Viera Stopjaková
2010	C	`conf`	The novel approach to wideband RFIC receivers in standard CMOS process. DDECS Libor Majer, Viera Stopjaková
2009	C	`conf`	Comparison of different test strategies on a mixed-signal circuit. DDECS Juraj Brenkus, Viera Stopjaková, Ronny Vanhooren, Anton Chichkov
2009	C	`conf`	Power devices current monitoring using horizontal and vertical magnetic force sensor. DDECS Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková
2009	—	`conf`	Vertical and horizontal magnetic force sensor and application of sensor in power devices. ECCTD Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková
2008	—	`conf`	Automated Synchronous-to-Asynchronous Circuits Conversion: A Survey. PATMOS Martin Simlastík, Viera Stopjaková
2008	C	`conf`	Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology. DDECS Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjaková
2008	J	`jnl`	DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits. IEEE Trans. Ind. Electron. Witold A. Pleskacz, Viera Stopjaková, Tomasz Borejko, Artur Jutman, Andrzej Walkanis
2008	C	`conf`	Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation. DDECS Juraj Brenkus, Viera Stopjaková, Jozef Mihálov
2008	C	`conf`	On-chip Integration of Magnetic Force Sensing Current Monitors. DDECS Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek
2008	—	`conf`	On-chip supply current monitoring units using magnetic force sensing. ICECS Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek
2008	C	`conf`	Portable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes. DDECS Libor Majer, Viera Stopjaková
2007	C	`conf`	Clockless Implementation of LEON2 for Low-Power Applications. DDECS Martin Simlastík, Viera Stopjaková, Libor Majer, Peter Malík
2006	—	`conf`	DefSim: CMOS Defects on Chip for Research and Education. LATW Witold A. Pleskacz, Tomasz Borejko, Andrzej Walkanis, Viera Stopjaková, Artur Jutman, Raimund Ubar
2006	C	`conf`	New Current Monitor Using Auto Zero Voltage Comparator for IDD Testing of Mixed-signal Circuits. DDECS Vladislav Nagy, Viera Stopjaková
2006	C	`conf`	PCA Data Preprocessing for Neural Network-based Detection of Parametric Defects in Analog IC. DDECS Pavol Malosek, Viera Stopjaková
2005	J	`jnl`	Defect detection in analog and mixed circuits by neural networks using wavelet analysis. IEEE Trans. Reliab. Viera Stopjaková, Pavol Malosek, Marek Matej, Vladislav Nagy, Martin Margala
2004	J	`jnl`	Classification of Defective Analog Integrated Circuits Using Artificial Neural Networks. J. Electron. Test. Viera Stopjaková, Pavol Malosek, Daniel Micusík, Marek Matej, Martin Margala
2002	J	`jnl`	Application of Feed-forward Artificial Neural Networks to the Identification of Defective Analog Integrated Circuits. Neural Comput. Appl. Daniel Micusík, Viera Stopjaková, Lubica Benusková
2002	—	`conf`	Neural Networks-Based Parametric Testing of Analog IC. DFT Viera Stopjaková, Daniel Micusík, Lubica Benusková, Martin Margala
2000	—	`conf`	I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test. IOLTW Martin Margala, Srdjan Dragic, Ahmed El-Abasiry, Samuel Ekpe, Viera Stopjaková
1999	A	`conf`	On-Chip Transient Current Monitor for Testing of Low Voltage CMOS IC. DATE Viera Stopjaková, Hans A. R. Manhaeve, M. Sidiropulos
1997	—	`conf`	CCII+ current conveyor based BIC monitor for I ED&TC Viera Stopjaková, Hans A. R. Manhaeve