Vianney Lapotre

42 papers B 4C 5Journal 13Unranked 19

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Fault Injection in On-Chip Interconnects: A Comparative Study of Wishbone, AXI-Lite, and AXI. CoRR Hongwei Zhao, Vianney Lapotre, Guy Gogniat
2024	—	`conf`	Defending the Citadel: Fault Injection Attacks Against Dynamic Information Flow Tracking and Related Countermeasures. ISVLSI William Pensec, Francesco Regazzoni, Vianney Lapotre, Guy Gogniat
2023	—	`book`	Contributions à la sécurité des systèmes embarqués face aux attaques logiques et physiques. (Contributions to the security of embedded systems against logical and physical attacks). Vianney Lapotre
2023	—	`conf`	Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections. EuroS&P Workshops Nicolas Gaudin, Jean-Loup Hatchikian-Houdot, Frédéric Besson, Pascal Cotret, Guy Gogniat, Guillaume Hiet, Vianney Lapotre, Pierre Wilke
2022	J	`jnl`	The Kingsguard OS-level mitigation against cache side-channel attacks using runtime detection. Ann. des Télécommunications Maria Mushtaq, Muhammad Muneeb Yousaf, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat
2020	J	`jnl`	FLUSH + PREFETCH: A countermeasure against access-driven cache-based side-channel attacks. J. Syst. Archit. Muhammad Asim Mukhtar, Maria Mushtaq, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat
2020	J	`jnl`	Meet the Sherlock Holmes' of Side Channel Leakage: A Survey of Cache SCA Detection Techniques. IEEE Access Ayaz Akram, Maria Mushtaq, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat
2020	J	`jnl`	WHISPER: A Tool for Run-Time Detection of Side-Channel Attacks. IEEE Access Maria Mushtaq, Jeremy Bricq, Muhammad Khurram Bhatti, Ayaz Akram, Vianney Lapotre, Guy Gogniat, Pascal Benoit
2020	J	`jnl`	Winter is here! A decade of cache-based side-channel attacks, detection & mitigation for RSA. Inf. Syst. Maria Mushtaq, Muhammad Asim Mukhtar, Vianney Lapotre, Muhammad Khurram Bhatti, Guy Gogniat
2019	—	`conf`	Sherlock Holmes of Cache Side-Channel Attacks in Intel's x86 Architecture. CNS Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Usman Ali, Vianney Lapotre, Guy Gogniat
2018	—	`conf`	A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components. AsianHOST Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat, Arnab Kumar Biswas
2018	—	`conf`	A small and adaptive coprocessor for information flow tracking in ARM SoCs. ReConFig Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Arnab Kumar Biswas, Vianney Lapotre, Guy Gogniat
2018	J	`jnl`	Application Deployment Strategies for Spatial Isolation on Many-Core Accelerators. ACM Trans. Embed. Comput. Syst. Maria Mendez Real, Philipp Wehner, Vianney Lapotre, Diana Göhringer, Guy Gogniat
2018	—	`conf`	Fast Evaluation of Homomorphic Encryption Schemes Based on Ring-LWE. NTMS Cyrielle Feron, Vianney Lapotre, Loïc Lagadec
2018	J	`jnl`	Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm. IEEE Trans. Computers Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
2018	—	`conf`	Machine Learning For Security: The Case of Side-Channel Attack Detection at Run-time. ICECS Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Maham Chaudhry, Muhammad Muneeb Yousaf, Umer Farooq, Vianney Lapotre, Guy Gogniat
2018	—	`conf`	NIGHTs-WATCH: a cache-based side-channel intrusion detector using hardware performance counters. HASP@ISCA Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Maham Chaudhry, Vianney Lapotre, Guy Gogniat
2018	—	`conf`	Run-time Detection of Prime + Probe Side-Channel Attack on AES Encryption Algorithm. GIIS Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Rao Naveed Bin Rais, Vianney Lapotre, Guy Gogniat
2018	J	`jnl`	Towards a hardware-assisted information flow tracking ecosystem for ARM processors. CoRR Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
2017	J	`jnl`	A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm. ACM Trans. Embed. Comput. Syst. Vincent Migliore, Cédric Seguin, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat, Russell Tessier
2017	B	`conf`	ARMHEx: A framework for efficient DIFT in real-world SoCs. FPL Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
2017	B	`conf`	ARMHEx: A hardware extension for DIFT on ARM-based SoCs. FPL Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
2017	J	`jnl`	Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decoding. EURASIP J. Adv. Signal Process. Vianney Lapotre, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet
2017	C	`conf`	PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption Schemes. SECRYPT Cyrielle Feron, Vianney Lapotre, Loïc Lagadec
2016	J	`jnl`	A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet
2016	C	`conf`	ALMOS Many-Core Operating System Extension with New Secure-Enable Mechanisms for Dynamic Creation of Secure Zones. PDP Maria Mendez Real, Vincent Migliore, Vianney Lapotre, Guy Gogniat
2016	—	`conf`	Dynamic spatially isolated secure zones for NoC-based many-core accelerators. ReCoSoC Maria Mendez Real, Philipp Wehner, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat
2016	—	`conf`	Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm. FPT Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
2016	—	`conf`	MPSoCSim extension: An OVP simulator for the evaluation of cluster-based multi and many-core architectures. SAMOS Maria Mendez Real, Philipp Wehner, Jens Rettkowski, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat
2016	B	`conf`	Towards a hardware-assisted information flow tracking ecosystem for ARM processors. FPL Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
2015	—	`conf`	A trace-driven approach for fast and accurate simulation of manycore architectures. ASP-DAC Anastasiia Butko, Rafael Garibotti, Luciano Ost, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Chris Adeniyi-Jones
2015	—	`conf`	Exploration of polynomial multiplication algorithms for homomorphic encryption schemes. ReConFig Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
2015	—	`conf`	On the Performance Exploration of 3D NoCs with Resistive-Open TSVs. ISVLSI Charles Effiong, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial, Khalid Latif
2014	—	`conf`	Performance exploration of partially connected 3D NoCs under manufacturing variability. NEWCAS Anelise Kologeski, Fernanda Lima Kastensmidt, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial
2013	—	`conf`	A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP context. ISVLSI Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner
2013	—	`conf`	An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture. ReCoSoC Vianney Lapotre, Michael Hübner, Guy Gogniat, Purushotham Murugappa, Amer Baghdadi, Jean-Philippe Diguet
2013	B	`conf`	Dynamic branch prediction for high-level synthesis. FPL Vianney Lapotre, Philippe Coussy, Cyrille Chavet, Hugues Wouafo, Robin Danilo
2013	J	`jnl`	Introduction de la prédiction de branchement dans la synthèse de haut niveau. Tech. Sci. Informatiques Vianney Lapotre, Philippe Coussy, Cyrille Chavet
2013	C	`conf`	Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder. ISCAS Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner
2013	C	`conf`	Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes. RSP Purushotham Murugappa, Vianney Lapotre, Amer Baghdadi, Michel Jézéquel
2013	C	`conf`	Stopping-Free Dynamic Configuration of a Multi-ASIP Turbo Decoder. DSD Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet
2012	—	`conf`	An analytical approach for sizing of heterogeneous multiprocessor flexible platforms for iterative demapping and channel decoding. ReConFig Vianney Lapotre, Guy Gogniat, Jean-Philippe Diguet, Salim Haddad, Amer Baghdadi