Vera Pantelic

40 papers A 2B 2C 4Journal 15Unranked 17
YearRankTypeTitle / Venue / Authors
2025 — conf
Can Generative AI Produce Test Cases? An Experience from the Automotive Domain.
SIGSOFT FSE Companion
Stephen Wynn-Williams, Ryan Tyrrell, Vera Pantelic, Mark Lawford, Claudio Menghi, Phaneendra Nalla, Hassan Artail
2025 — conf
Engineering Automotive Digital Twins on Standardized Architectures: A Case Study.
MODELS-C
Stefan Ramdhan, Winnie Trandinh, Istvan David, Vera Pantelic, Mark Lawford
2025 J jnl
Engineering Automotive Digital Twins on Standardized Architectures: A Case Study.
CoRR
Stefan Ramdhan, Winnie Trandinh, Istvan David, Vera Pantelic, Mark Lawford
2025 J jnl
Search-based Testing of Simulink Models with Requirements Tables.
CoRR
Federico Formica, Chris George, Shayda Rahmatyan, Vera Pantelic, Mark Lawford, Angelo Gargantini, Claudio Menghi
2024 J jnl
Simulation-Based Testing of Simulink Models With Test Sequence and Test Assessment Blocks.
IEEE Trans. Software Eng.
Federico Formica, Tony Fan, Akshay Rajhans, Vera Pantelic, Mark Lawford, Claudio Menghi
2024 C conf
Simulation-based Analysis of a Novel Loop-based Road Topology for Autonomous Vehicles.
IV
Stefan Ramdhan, Winnie Trandinh, Sathurshan Arulmohan, Xiayong Hu, Spencer Deevy, Victor Bandur, Vera Pantelic, Mark Lawford, Alan Wassyng
2024 J jnl
Simulation-based Analysis of a Novel Loop-based Road Topology for Autonomous Vehicles.
CoRR
Stefan Ramdhan, Winnie Trandinh, Sathurshan Arulmohan, Xiayong Hu, Spencer Deevy, Victor Bandur, Vera Pantelic, Mark Lawford, Alan Wassyng
2024 — conf
Towards Model Product Lines: Composition of EMF Models.
MoDELS (Companion)
Horacio Hoyos Rodriguez, Victor Bandur, Vera Pantelic, Mark Lawford, Richard F. Paige
2024 — conf
Using Boundary Objects for Continuous Compliance in Automotive Development.
ISSRE (Workshops)
Anthony Shenouda, Tiziano Santilli, Faezeh Siavashi, Thomas Chiang, Nicholas Annable, Horacio Hoyos Rodriguez, Richard F. Paige, Patrizio Pelliccione, Mark Lawford, Alan Wassyng, Vera Pantelic
2023 — conf
An Automotive Architecture Product Line for E/E Powertrain Architectures.
MoDELS (Companion)
Horacio Hoyos Rodriguez, Naveen Ganesh Muralidharan, Faezeh Siavashi, Vera Pantelic, Victor Bandur, Mark Lawford, Richard F. Paige
2023 — conf
Assurance Cases for Timing Properties of Automotive TSN Networks.
SAFECOMP Workshops
Ryan Kapinski, Vera Pantelic, Victor Bandur, Alan Wassyng, Mark Lawford
2023 — conf
Bridging the Gap Between System Architecture and Software Design using Model Transformation.
ISSREW
Faezeh Siavashi, Horacio Hoyos Rodriguez, Vera Pantelic, Mark Lawford, Richard F. Paige, Monika Jaskolka, Guanrui Hou, Alessandro Verde
2023 J jnl
Repository mining for changes in Simulink and Stateflow models.
Softw. Syst. Model.
Monika Jaskolka, Vera Pantelic, Alan Wassyng, Richard F. Paige, Mark Lawford
2023 — conf
Test Case Generation for Drivability Requirements of an Automotive Cruise Controller: An Experience with an Industrial Simulator.
ESEC/SIGSOFT FSE
Federico Formica, Nicholas Petrunti, Lucas Bruck, Vera Pantelic, Mark Lawford, Claudio Menghi
2023 J jnl
Test Case Generation for Drivability Requirements of an Automotive Cruise Controller: An Experience with an Industrial Simulator.
CoRR
Federico Formica, Nicholas Petrunti, Lucas Bruck, Vera Pantelic, Mark Lawford, Claudio Menghi
2023 — conf
Using Assurance Cases to Prevent Malicious Behaviour from Targeting Safety Vulnerabilities.
SAFECOMP Workshops
Victor Bandur, Mark Lawford, Sébastien Mosser, Richard F. Paige, Vera Pantelic, Alan Wassyng
2022 A conf
Integrating Software Issue Tracking and Traceability Models.
ICSME
Naveen Ganesh Muralidharan, Vera Pantelic, Victor Bandur, Richard F. Paige
2022 J jnl
Simulation-based Testing of Simulink Models with Test Sequence and Test Assessment Blocks.
CoRR
Federico Formica, Tony Fan, Akshay Rajhans, Vera Pantelic, Mark Lawford, Claudio Menghi
2021 — conf
A Safety Architecture for Centralized E/E Architectures.
DSN Workshops
Victor Bandur, Vera Pantelic, Timofey Tomashevskiy, Mark Lawford
2021 J jnl
Making the Case for Centralized Automotive E/E Architectures.
IEEE Trans. Veh. Technol.
Victor Bandur, Gehan M. K. Selim, Vera Pantelic, Mark Lawford
2021 A conf
Repository Mining for Changes in Simulink Models.
MoDELS
Monika Jaskolka, Vera Pantelic, Alan Wassyng, Mark Lawford, Richard F. Paige
2020 — conf
Applying Modular Decomposition in Simulink.
ISSRE Workshops
Monika Jaskolka, Stephen Scott, Vera Pantelic, Alan Wassyng, Mark Lawford
2020 — conf
Change impact analysis in Simulink designs of embedded systems.
ESEC/SIGSOFT FSE
Bennett Mackenzie, Vera Pantelic, Gordon Marks, Stephen Wynn-Williams, Gehan M. K. Selim, Mark Lawford, Alan Wassyng, Moustapha Diab, Feisel Weslati
2020 J jnl
Supporting Modularity in Simulink Models.
CoRR
Monika Jaskolka, Vera Pantelic, Alan Wassyng, Mark Lawford
2019 B conf
SL2SF: Refactoring Simulink to Stateflow.
FASE
Stephen Wynn-Williams, Zinovy Diskin, Vera Pantelic, Mark Lawford, Gehan M. K. Selim, Curtis Milo, Moustapha Diab, Feisel Weslati
2019 C conf
Something is Rotten in the State of Documenting Simulink Models.
MODELSWARD
Vera Pantelic, Alexander Schaap, Alan Wassyng, Victor Bandur, Mark Lawford
2018 — conf
Documenting Simulink designs of embedded systems.
MoDELS (Companion)
Alexander Schaap, Gordon Marks, Vera Pantelic, Mark Lawford, Gehan M. K. Selim, Alan Wassyng, Lucian M. Patcas
2018 J jnl
Software engineering practices and Simulink: bridging the gap.
Int. J. Softw. Tools Technol. Transf.
Vera Pantelic, Steven M. Postma, Mark Lawford, Monika Jaskolka, Bennett Mackenzie, Alexandre Korobkine, Marc Bender, Jeff Ong, Gordon Marks, Alan Wassyng
2016 B conf
Using STPA in an ISO 26262 Compliant Process.
SAFECOMP
Archana Mallya, Vera Pantelic, Morayo Adedjouma, Mark Lawford, Alan Wassyng
2015 — conf
A Methodology for the Simplification of Tabular Designs in Model-Based Development.
FormaliSE@ICSE
Monika Bialy, Mark Lawford, Vera Pantelic, Alan Wassyng
2015 C conf
A Toolset for Simulink - Improving Software Engineering Practices in Development with Simulink.
MODELSWARD
Vera Pantelic, Steven M. Postma, Mark Lawford, Alexandre Korobkine, Bennett Mackenzie, Jeff Ong, Marc Bender
2015 J jnl
Signature required: Making Simulink data flow and interfaces explicit.
Sci. Comput. Program.
Marc Bender, Karen Laurin, Mark Lawford, Vera Pantelic, Alexandre Korobkine, Jeff Ong, Bennett Mackenzie, Monika Bialy, Steven M. Postma
2014 — conf
A Framework for Supervisory Control of Probabilistic Discrete Event Systems.
WODES
Vera Pantelic, Mark Lawford, Steven M. Postma
2014 C conf
Signature Required - Making Simulink Data Flow and Interfaces Explicit.
MODELSWARD
Marc Bender, Karen Laurin, Mark Lawford, Jeff Ong, Steven M. Postma, Vera Pantelic
2012 J jnl
A pseudometric in supervisory control of probabilistic discrete event systems.
Discret. Event Dyn. Syst.
Vera Pantelic, Mark Lawford
2012 J jnl
Optimal Supervisory Control of Probabilistic Discrete Event Systems.
IEEE Trans. Autom. Control.
Vera Pantelic, Mark Lawford
2010 — conf
Use of a metric in supervisory control of probabilistic discrete event systems.
WODES
Vera Pantelic, Mark Lawford
2009 J jnl
Probabilistic Supervisory Control of Probabilistic Discrete Event Systems.
IEEE Trans. Autom. Control.
Vera Pantelic, Steven M. Postma, Mark Lawford
2006 — conf
Inspection of Concurrent Systems: Combining Tables, Theorem Proving and Model Checking.
Software Engineering Research and Practice
Vera Pantelic, Xiao-Hui Jin, Mark Lawford, David Lorge Parnas
2006 J jnl
Towards Integrated Verification of Timed Transition Models.
Fundam. Informaticae
Mark Lawford, Vera Pantelic, Hong Zhang