Vasilis F. Pavlidis

101 papers A 13B 2C 12Journal 28Unranked 44

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	3DPlace: Timing-driven Detailed Placement for Monolithic 3D ICs. ISVLSI Dimitrios Vamvakidis, Christos Georgakidis, Aikaterini Tsilingiri, Nikolaos Sketopoulos, Christos P. Sotiriou, Vasilis F. Pavlidis
2025	A	`conf`	A Comprehensive Inductance-Aware Modeling Approach to Power Distribution Network in Heterogeneous 3D Integrated Circuits. DATE Quansen Wang, Vasilis F. Pavlidis, Yuanqing Cheng
2025	J	`jnl`	A Design Methodology for Thermal Monitoring of Reusable Passive Interposers With RTDs. IEEE Trans. Very Large Scale Integr. Syst. Andreas Tsiougkos, Vasilis F. Pavlidis
2025	—	`conf`	An Ultra-Low Power CMOS Pulse Generator for Skyrmionic Circuits. ICECS Georgios Chararas, Christoforos Moutafis, Vasilis F. Pavlidis
2025	—	`conf`	Enhancing Performance of Floating Point Units Using Parallel Prefix Adders. ISVLSI Andreas-Efstathios Eleftheriadis, Thomas Noulis, Georgios Keramidas, Vasilis F. Pavlidis
2025	C	`conf`	Impact of Prolonged Thermal Stress on Intel i7-6600U Graphics Performance. ICCE Panagiotis Karydopoulos, Vasilis F. Pavlidis
2025	—	`conf`	Inductive Effect-Aware Power Distribution Network Modeling and Analysis for Heterogeneous 3D Integrated Circuits. ISVLSI Quansen Wang, Vasilis F. Pavlidis, Xuning Feng, Rui Wang, Wei Zhang, Yuanqing Cheng
2025	—	`conf`	Integrating P-Bits in MTJs: A Bridge to Efficient Stochastic Computing. MOCAST Nellie Laleni, Sina Ranjbar, Ran Zhang, Andreas Tsiougkos, Nandakishor Yadav, Vasilis F. Pavlidis, Thomas Kämpfe
2025	—	`conf`	PV-Clock: Process Variation-Aware 3D Clock Network Synthesis for Robust and Power-Efficient Timing Optimization. ISVLSI Yiyu Wang, Vasilis F. Pavlidis, Rui Wang, Yuanqing Cheng
2025	—	`conf`	Parametric RISC-V Compliant Floating-Point Arithmetic and Conversion Circuits. ISVLSI Spyros Chalkias, Anastasis Avgoustidis, Thomas Noulis, Georgios Keramidas, Vasilis F. Pavlidis
2025	—	`conf`	Tournament Cache Decay: Tight Control of Leakage Power for Last-Level Caches. ISVLSI Theodoros Papavasileiou, Georgios Keramidas, Vasilis F. Pavlidis
2025	A	`conf`	VLSI Design and Experimental Demonstration of Photonic Interposers in Thin-Film Lithium Niobate. ICCAD Georgios Kyriazidis, Aristotelis Tsekouras, John Davis, Vasilis F. Pavlidis, Gage Hills
2024	J	`jnl`	A New Dataflow Implementation to Improve Energy Efficiency of Monolithic 3D Systolic Arrays. CoRR Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
2024	A	`conf`	ARO: Autoregressive Operator Learning for Transferable and Multi-fidelity 3D-IC Thermal Analysis With Active Learning. ICCAD Mingyue Wang, Yuanqing Cheng, Weiheng Zeng, Zhenjie Lu, Vasilis F. Pavlidis, Wei Xing
2024	—	`conf`	CMOS Charge Pump Design for Minimal Silicon Footprint. MOCAST Vasiliki Gogolou, Thomas Noulis, Vasilis F. Pavlidis
2024	—	`conf`	Energy-Efficient Dataflow Design for Monolithic 3D Systolic Arrays with Resistive RAM. IGSC Prachi Shukla, Mohammadamin Hajikhodaverdian, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
2024	—	`conf`	Enhanced Detection of Thermal Covert Channel Attacks in Multicore Processors. ISQED Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman
2024	J	`jnl`	MORCIC: Model Order Reduction Techniques for Electromagnetic Models of Integrated Circuits. CoRR Dimitrios Garyfallou, Athanasios Stefanou, Christos Giamouzis, Moschos Antoniadis, Georgios Chararas, Konstantinos Chatzis, Dimitris Samaras, Rafaela Themeli, Anastasios Michailidis, Vasiliki Gogolou, Nikos Zachos, Nestor E. Evmorfopoulos, Thomas Noulis, Vasilis F. Pavlidis, Alkiviadis Hatzopoulos, Elpida Chatzineofytou, Yiannis Moisiadis
2024	A	`conf`	OCTS: An Optical Clock Tree Synthesis Methodology for 2.5D Systems. ICCAD Aristotelis Tsekouras, Georgios Kyriazidis, Gage Hills, Vasilis F. Pavlidis
2024	—	`conf`	Ternary Clock Tree Synthesis for 3D ICs. SMACD Christos Pavlidis, Nikos Sketopoulos, Christos P. Sotiriou, Vasilis F. Pavlidis
2024	—	`conf`	Two Stage Diode-String Architecture for Ultra-Low Power Digital to Analog Converters. SMACD Andreas Tsiougkos, Moschos Antoniadis, Vasilis F. Pavlidis
2023	—	`conf`	A Novel Design Methodology for Modular, Digitally Controlled, Multiband, mmWave LNAs. MOCAST Georgios Chararas, Athanasios Stefanou, Alkiviadis Hatzopoulos, Vasilis F. Pavlidis
2023	—	`conf`	Mismatch Driven Systematic Design Methodology for Transistor Based Active Resistors. MWSCAS Andreas Tsiougkos, Alkis A. Hatzopoulos, Vasilis F. Pavlidis
2023	J	`jnl`	TREAD-M3D: Temperature-Aware DNN Accelerators for Monolithic 3-D Mobile Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
2022	J	`jnl`	Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective. Integr. Yuanqing Cheng, Xiaochen Guo, Vasilis F. Pavlidis
2022	J	`jnl`	Energy-Efficient Encoding for High-Speed Serial Interfaces. IEEE Trans. Very Large Scale Integr. Syst. Eleni Maragkoudaki, William B. Toms, Vasilis F. Pavlidis
2022	J	`jnl`	High Bandwidth Thermal Covert Channel in 3-D-Integrated Multicore Processors. IEEE Trans. Very Large Scale Integr. Syst. Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman
2022	C	`conf`	Mitigating EM Side-Channel Attacks with Dynamic Delay Insertion and Data Bus Inversion. ISCAS Minmin Jiang, Eleni Maragkoudaki, Vasilis F. Pavlidis
2022	C	`conf`	Practical Day-Ahead Power Prediction of Solar Energy-Harvesting for IoT Systems. VLSI-SoC Konstantinos Falis, Andreas Tsiougkos, Vasilis F. Pavlidis
2022	J	`jnl`	Temperature-Aware Monolithic 3D DNN Accelerators for Biomedical Applications. CoRR Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
2022	—	`conf`	Thermal Modeling and Design Exploration for Monolithic 3D ICs. ISQED Baoli Peng, Vasilis F. Pavlidis, Yi-Chung Chen, Yuanqing Cheng
2021	—	`conf`	A PWM-free DC-DC Boost Converter with 0.43 V Input for Extended Battery Use in IoT Applications. MWSCAS Andreas Tsiougkos, Vasilis F. Pavlidis
2021	J	`jnl`	Design of compact LC lowpass filters based on coaxial through-silicon vias array. Microelectron. J. Xiangkun Yin, Fengjuan Wang, Vasilis F. Pavlidis, Xiaoxian Liu, Qijun Lu, Tao Zhang, Yang Liu
2021	J	`jnl`	Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects. IEEE Trans. Circuits Syst. II Express Briefs Krithika Dhananjay, Prachi Shukla, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman
2021	—	`conf`	Performance-Aware Interconnect Delay Insertion Against EM Side-Channel Attacks. SLIP Minmin Jiang, Vasilis F. Pavlidis
2021	J	`jnl`	TSV-based hairpin bandpass filter for 6G mobile communication applications. IEICE Electron. Express Fengjuan Wang, Lei Ke, Xiangkun Yin, Vasilis F. Pavlidis, Ningmei Yu, Yuan Yang
2021	—	`conf`	Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators. ASP-DAC Prachi Shukla, Sean S. Nemtzow, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
2020	—	`conf`	Cost Modeling and Analysis of TSV and Contactless 3D-ICs. ACM Great Lakes Symposium on VLSI Minmin Jiang, Ioannis A. Papistas, Vasilis F. Pavlidis
2020	J	`jnl`	Energy-Efficient Time-Based Adaptive Encoding for Off-Chip Communication. IEEE Trans. Very Large Scale Integr. Syst. Eleni Maragkoudaki, Vasilis F. Pavlidis
2020	—	`conf`	Metal Stack and Partitioning Exploration for Monolithic 3D ICs. ISVLSI Nikolaos Sketopoulos, Christos P. Sotiriou, Vasilis F. Pavlidis
2020	—	`conf`	Zero-skew Clock Network Synthesis for Monolithic 3D ICs with Minimum Wirelength. ACM Great Lakes Symposium on VLSI Wei Wang, Vasilis F. Pavlidis, Yuanqing Cheng
2019	A	`conf`	Adaptive Transient Leakage-Aware Linearised Model for Thermal Analysis of 3-D ICs. DATE Chao Zhang, Milan Mihajlovic, Vasilis F. Pavlidis
2019	A	`conf`	Adaptive Word Reordering for Low-Power Inter-Chip Communication. DATE Eleni Maragkoudaki, Przemyslaw Mroszczyk, Vasilis F. Pavlidis
2019	—	`conf`	An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs. ACM Great Lakes Symposium on VLSI Prachi Shukla, Ayse K. Coskun, Vasilis F. Pavlidis, Emre Salman
2019	J	`jnl`	Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019	C	`conf`	Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits. ICCD Charalampos Antoniadis, Milan Mihajlovic, Nestor E. Evmorfopoulos, Georgios I. Stamoulis, Vasilis F. Pavlidis
2019	J	`jnl`	Energy Efficient Flash ADC With PVT Variability Compensation Through Advanced Body Biasing. IEEE Trans. Circuits Syst. II Express Briefs Przemyslaw Mroszczyk, John Goodacre, Vasilis F. Pavlidis
2019	J	`jnl`	Fabrication Cost Analysis for Contactless 3-D ICs. IEEE Trans. Circuits Syst. II Express Briefs Ioannis A. Papistas, Vasilis F. Pavlidis, Dimitrios Velenis
2019	A	`conf`	PVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs. FPGA Konstantinos Maragos, George Lentaris, Dimitrios Soudris, Vasilis F. Pavlidis
2019	—	`ed.`	Proceedings of the International Conference on Omni-Layer Intelligent Systems, COINS 2019, Crete, Greece, May 5-7, 2019. COINS Farshad Firouzi, Krishnendu Chakrabarty, Bahar J. Farahani, Fangming Ye, Vasilis F. Pavlidis
2018	J	`jnl`	Contactless Heterogeneous 3-D ICs for Smart Sensing Systems. Integr. Ioannis A. Papistas, Vasilis F. Pavlidis
2018	J	`jnl`	Efficient Modeling of Crosstalk Noise on Power Distribution Networks for Contactless 3-D ICs. IEEE Trans. Circuits Syst. I Regul. Pap. Ioannis A. Papistas, Vasilis F. Pavlidis
2018	—	`conf`	Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies. NANOARCH Eleni Maragkoudaki, Przemyslaw Mroszczyk, Vasilis F. Pavlidis
2018	C	`conf`	Mismatch Compensation Technique for Inverter-Based CMOS Circuits. ISCAS Przemyslaw Mroszczyk, Vasilis F. Pavlidis
2018	J	`jnl`	The MTA: An Advanced and Versatile Thermal Simulator for Integrated Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Scott Ladenheim, Yi-Chung Chen, Milan Mihajlovic, Vasilis F. Pavlidis
2018	—	`conf`	Ultra-low swing CMOS transceiver for 2.5-D integrated systems. ISQED Przemyslaw Mroszczyk, Vasilis F. Pavlidis
2017	A	`conf`	Application performance improvement by exploiting process variability on FPGA devices. DATE Konstantinos Maragos, George Lentaris, Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis
2017	A	`conf`	Computationally efficient standard-cell FEM-based thermal analysis. ICCAD Yi-Chung Chen, Scott Ladenheim, Harry Kalargaris, Milan Mihajlovic, Vasilis F. Pavlidis
2017	C	`conf`	Contactless inter-tier communication for heterogeneous 3-D ICs. ISCAS Ioannis A. Papistas, Vasilis F. Pavlidis
2017	—	`conf`	STA compatible backend design flow for TSV-based 3-D ICs. ISQED Harry Kalargaris, Yi-Chung Chen, Vasilis F. Pavlidis
2017	J	`jnl`	Voltage scaling for 3-D ICs: When, how, and how much? Microelectron. J. Harry Kalargaris, Vasilis F. Pavlidis
2016	C	`conf`	Crosstalk noise effects of on-chip inductive links on power delivery networks. ISCAS Ioannis A. Papistas, Vasilis F. Pavlidis
2016	A	`conf`	IC thermal analyzer for versatile 3-D structures using multigrid preconditioned krylov methods. ICCAD Scott Ladenheim, Yi-Chung Chen, Milan Mihajlovic, Vasilis F. Pavlidis
2016	—	`conf`	Inter-Tier Crosstalk Noise On Power Delivery Networks For 3-D ICs With Inductively-Coupled Interconnects. ACM Great Lakes Symposium on VLSI Ioannis A. Papistas, Vasilis F. Pavlidis
2015	—	`conf`	Bandwidth-to-area comparison of through silicon vias and inductive links for 3-D ICs. ECCTD Ioannis A. Papistas, Vasilis F. Pavlidis
2014	—	`conf`	Efficient teaching of digital design with automated assessment and feedback. EWME Paul W. Nutter, Vasilis F. Pavlidis, Jeffrey Pepper
2014	—	`conf`	Interconnect design tradeoffs for silicon and glass interposers. NEWCAS Harry Kalargaris, Vasilis F. Pavlidis
2013	C	`conf`	3.5-D integration: A case study. ISCAS Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli
2013	J	`jnl`	An Enhanced Design Methodology for Resonant Clock Trees. J. Low Power Electron. Somayyeh Rahimian, Vasilis F. Pavlidis, Xifan Tang, Giovanni De Micheli
2013	J	`jnl`	Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise. IEEE Trans. Very Large Scale Integr. Syst. Hu Xu, Vasilis F. Pavlidis, Xifan Tang, Wayne P. Burleson, Giovanni De Micheli
2012	J	`jnl`	A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric. ACM Trans. Reconfigurable Technol. Syst. Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris
2012	J	`jnl`	Effect of process variations in 3D global clock distribution networks. ACM J. Emerg. Technol. Comput. Syst. Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2012	B	`conf`	Enhanced wafer matching heuristics for 3-D ICs. ETS Vasilis F. Pavlidis, Hu Xu, Giovanni De Micheli
2012	J	`jnl`	Inter-Plane Communication Methods for 3-D ICs. J. Low Power Electron. Somayyeh Rahimian, Vasilis F. Pavlidis, Giovanni De Micheli
2012	—	`conf`	The combined effect of process variations and power supply noise on clock skew and jitter. ISQED Hu Xu, Vasilis F. Pavlidis, Wayne P. Burleson, Giovanni De Micheli
2012	A	`conf`	Voltage propagation method for 3-D power grid analysis. DATE Cheng Zhang, Vasilis F. Pavlidis, Giovanni De Micheli
2011	A	`conf`	Analytical heat transfer model for thermal through-silicon vias. DATE Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011	J	`jnl`	Clock Distribution Networks in 3-D Integrated Systems. IEEE Trans. Very Large Scale Integr. Syst. Vasilis F. Pavlidis, Ioannis Savidis, Eby G. Friedman
2011	C	`conf`	Clock distribution models of 3-D integrated systems. ISCAS Ioannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman
2011	—	`conf`	Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits. PATMOS Somayyeh Rahimian, Vasilis F. Pavlidis, Giovanni De Micheli
2011	—	`ch.`	Physical Analysis of NoC Topologies for 3-D Integrated Systems. 3D Integration for NoC-based SoC Architectures Vasilis F. Pavlidis, Eby G. Friedman
2011	C	`conf`	Skew variability in 3-D ICs with multiple clock domains. ISCAS Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2010	—	`conf`	Performance analysis of 3-D monolithic integrated circuits. 3DIC Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Vasilis F. Pavlidis, Giovanni De Micheli
2010	—	`conf`	Physical design tradeoffs in power distribution networks for 3-D ICs. ICECS Ioannis Tsioutsios, Vasilis F. Pavlidis, Giovanni De Micheli
2010	—	`conf`	Process-induced skew variation for scaled 2-D and 3-D ICs. SLIP Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2010	—	`conf`	Synchronization and power integrity issues in 3-D ICs. APCCAS Vasilis F. Pavlidis, Hu Xu, Ioannis Tsioutsios, Giovanni De Micheli
2009	A	`conf`	A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs. DATE Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris
2009	J	`jnl`	Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits. Proc. IEEE Vasilis F. Pavlidis, Eby G. Friedman
2009	—	`conf`	Power distribution paths in 3-D ICS. ACM Great Lakes Symposium on VLSI Vasilis F. Pavlidis, Giovanni De Micheli
2009	—	`conf`	Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits. NanoNet Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2008	—	`conf`	Clock distribution networks for 3-D ictegrated Circuits. CICC Vasilis F. Pavlidis, Ioannis Savidis, Eby G. Friedman
2008	—	`conf`	Physical Design Issues in 3-D Integrated Technologies. VLSI-SoC (Selected Papers) Vasilis F. Pavlidis, Eby G. Friedman
2008	J	`jnl`	Timing-driven via placement heuristics for three-dimensional ICs. Integr. Vasilis F. Pavlidis, Eby G. Friedman
2007	J	`jnl`	3-D Topologies for Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. Vasilis F. Pavlidis, Eby G. Friedman
2007	C	`conf`	A software-supported methodology for designing high-performance 3D FPGA architectures. VLSI-SoC Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris
2007	B	`conf`	Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support. FPL Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris
2006	—	`conf`	3-D Topologies for Networks-on-Chip. SoCC Vasilis F. Pavlidis, Eby G. Friedman
2006	C	`conf`	Via placement for minimum interconnect delay in three-dimensional (3D) circuits. ISCAS Vasilis F. Pavlidis, Eby G. Friedman
2005	—	`conf`	Interconnect delay minimization through interlayer via placement in 3-D ICs. ACM Great Lakes Symposium on VLSI Vasilis F. Pavlidis, Eby G. Friedman
2003	—	`conf`	A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems. ISCAS (5) Dimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis
2001	—	`conf`	Designing low-power energy recovery adders based on pass transistor logic. ICECS Dimitrios Soudris, Vasilis F. Pavlidis, Adonios Thanailakis