Vasileios Titopoulos

19 papers A 2Journal 13Unranked 4
YearRankTypeTitle / Venue / Authors
2026 J jnl
Vectorized FlashAttention with low-cost exponential computation in RISC-V vector processors.
J. Supercomput.
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 — conf
Custom Algorithm-based Fault Tolerance for Attention Layers in Transformers.
SOCC
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 J jnl
Custom Algorithm-based Fault Tolerance for Attention Layers in Transformers.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 — conf
Efficient Implementation of RISC-V Vector Permutation Instructions.
ISVLSI
Vasileios Titopoulos, George Alexakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Efficient Implementation of RISC-V Vector Permutation Instructions.
CoRR
Vasileios Titopoulos, George Alexakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 A conf
FLASH-D: FlashAttention with Hidden Softmax Division.
ISLPED
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
FLASH-D: FlashAttention with Hidden Softmax Division.
CoRR
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 — conf
Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators.
ISVLSI
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators.
CoRR
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.
IEEE Trans. Computers
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 — conf
Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs.
CF
Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs.
CoRR
Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processors.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2024 J jnl
A High-Level Synthesis Library for Synthesizing Efficient and Functional-Safe CNN Dataflow Accelerators.
IEEE Access
Dionysios Filippas, Christodoulos Peltekis, Vasileios Titopoulos, Ioannis Kansizoglou, Georgios Ch. Sirakoulis, Antonios Gasteratos, Giorgos Dimitrakopoulos
2024 J jnl
DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity.
IEEE Comput. Archit. Lett.
Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 J jnl
DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity.
CoRR
Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 A conf
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.
DATE
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2023 J jnl
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos