Vanchinathan Venkataramani

19 papers A* 2A 2B 2C 1Misc 3Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2022 J jnl
ASCENT: Communication Scheduling for SDF on Bufferless Software-Defined NoC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2020 J jnl
SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing.
ACM Trans. Embed. Comput. Syst.
Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2020 B conf
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips.
RTCSA
Niklas Ueter, Jian-Jia Chen, Georg von der Brüggen, Vanchinathan Venkataramani, Tulika Mitra
2020 Misc conf
Time-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing.
ICASSP
Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2020 A conf
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores.
DATE
Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
2019 B conf
SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing.
LCTES
Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2019 — conf
Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors.
SAMOS
Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
2019 J jnl
Scratchpad-Memory Management for Multi-Threaded Applications on Many-Core Architectures.
ACM Trans. Embed. Comput. Syst.
Vanchinathan Venkataramani, Mun Choon Chan, Tulika Mitra
2019 J jnl
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips.
CoRR
Niklas Ueter, Georg von der Brüggen, Jian-Jia Chen, Tulika Mitra, Vanchinathan Venkataramani
2018 J jnl
LOCUS: Low-Power Customizable Many-Core Architecture for Wearables.
ACM Trans. Embed. Comput. Syst.
Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
2018 — conf
Scalable Dynamic Task Scheduling on Adaptive Many-Core.
MCSoC
Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel
2017 J jnl
Defragmentation of Tasks in Many-Core Architecture.
ACM Trans. Archit. Code Optim.
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
2017 J jnl
Optimal Greedy Algorithm for Many-Core Scheduling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
2016 A conf
Distributed fair scheduling for many-cores.
DATE
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
2016 A* conf
Distributed scheduling for many-cores using cooperative game theory.
DAC
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
2016 Misc conf
LOCUS: low-power customizable many-core architecture for wearables.
CASES
Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
2014 C conf
Design space exploration of multiple loops on FPGAs using high level synthesis.
ICCD
Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar
2013 A* conf
Hierarchical power management for asymmetric multi-core in dark silicon era.
DAC
Thannirmalai Somu Muthukaruppan, Mihai Pricopi, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
2013 Misc conf
Power-performance modeling on asymmetric multi-cores.
CASES
Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin