Van Tam Nguyen

19 papers C 9Misc 1Journal 2Unranked 7

Year	Rank	Type	Title / Venue / Authors
2014	J	`jnl`	Delay-Reduction Technique for DWA Algorithms. IEEE Trans. Circuits Syst. II Express Briefs Chadi Jabbour, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau
2013	—	`conf`	A novel dynamic element matching technique suited for high pass ΔΣ ADCs. NEWCAS Chadi Jabbour, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau
2013	C	`conf`	Direct delta-sigma receiver: Analysis, modelization and simulation. ISCAS Minh-Tien Nguyen, Chadi Jabbour, Cyrius Ouffoue, Rayan Mina, Florent Sibille, Patrick Loumeau, Pascal Triaire, Van Tam Nguyen
2011	J	`jnl`	A Comparative Study of Loop Filter Alternatives in Second-Order High-Pass ΔΣ Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. Hasham Ahmed Khushk, Patrick Loumeau, Van Tam Nguyen
2011	C	`conf`	A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver. ISCAS Chadi Jabbour, Hasham Khushk, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau
2011	—	`conf`	A novel design methodology for multiplierless filters applied on ΔΣ decimators. ICECS Chadi Jabbour, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau
2011	C	`conf`	Generalized multi-stage closed loop sigma delta modulator. ISCAS Van Tam Nguyen, Hussein Fakhoury, Patrick Loumeau, Philippe Bénabès
2011	—	`conf`	High pass filter implementation comparison in unity STF high pass ΔΣ modulator. ICECS Van Tam Nguyen, Hasham Ahmed Khushk, Chadi Jabbour, Patrick Loumeau
2011	—	`conf`	High-pass or low-pass ΣΔ modulators? ICECS Chadi Jabbour, Hasham Ahmed Khushk, Van Tam Nguyen, Patrick Loumeau
2011	—	`conf`	Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications. ECCTD Alban Gruget, Morgan Roger, Van Tam Nguyen, Caroline Lelandais-Perrault, Philippe Bénabès, Patrick Loumeau
2010	C	`conf`	A new interpolation technique for TI ΣΔ A/D converters. ISCAS Chadi Jabbour, Ali Beydoun, Van Tam Nguyen, Patrick Loumeau
2010	C	`conf`	A technique to reduce the impact of hysterisys in ΣΔ analog to digital converters. ISCAS Chadi Jabbour, Van Tam Nguyen, Patrick Loumeau
2009	C	`conf`	A 1 V 65 nm CMOS Reconfigurable Time Interleaved High Pass SigmaDelta ADC. ISCAS Chadi Jabbour, David Camarero, Van Tam Nguyen, Patrick Loumeau
2009	C	`conf`	A 65 nm CMOS Digital Processor for Multi-mode Time Interleaved High-pass SigmaDelta A/D Converters. ISCAS Ali Beydoun, Van Tam Nguyen, Lirida A. B. Naviner, Patrick Loumeau
2006	C	`conf`	A CMOS implementation of time-interleaved high-pass Delta Sigma modulator. ISCAS Van Tam Nguyen, Patrick Loumeau, Jean-François Naviner
2006	C	`conf`	High-pass Delta Sigma modulator: from system analysis to circuit design. ISCAS Van Tam Nguyen, Patrick Loumeau, Jean-François Naviner
2002	—	`conf`	A time-interleaved chopper-stabilized delta-sigma analog to digital converter. ICECS Van Tam Nguyen, Patrick Loumeau, Jean-François Naviner
2002	Misc	`conf`	An interleaved delta-sigma analog to digital converter with digital correction. ICASSP Van Tam Nguyen, Patrick Loumeau, Jean-François Naviner
2002	—	`conf`	Analysis of time-interleaved delta-sigma analog to digital converter. VTC Spring Van Tam Nguyen, Patrick Loumeau, Jean-François Naviner