Vamsi Boppana - RankMe

36 papers A* 3A 8C 1Misc 12Journal 4Unranked 7

Year	Rank	Type	Title / Venue / Authors
2019	—	`conf`	Xilinx First 7nm Device: Versal AI Core (VC1902). Hot Chips Symposium Sagheer Ahmad, Sridhar Subramanian, Vamsi Boppana, Shankar Lakka, Fu-Hing Ho, Tomai Knopp, Juanjo Noguera, Gaurav Singh, Ralph Wittig
2016	J	`jnl`	A 16-nm Multiprocessing System-on-Chip Field-Programmable Gate Array Platform. IEEE Micro Sagheer Ahmad, Vamsi Boppana, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig
2015	—	`conf`	UltraScale+ MPSoC and FPGA families. Hot Chips Symposium Vamsi Boppana, Sagheer Ahmad, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig
2011	—	`conf`	Xilinx Zynq-7000 EPP: An extensible processing platform family. Hot Chips Symposium Vidya Rajagopalan, Vamsi Boppana, Sandeep Dutta, Brad Taylor, Ralph Wittig
2008	Misc	`conf`	Implementing the Best Processor Cores. VLSI Design Vamsi Boppana, Rahoul Varma, S. Balajee
2008	A	`conf`	Low power chips: a fabless asic perspective. ISLPED Shashank Bhonge, Vamsi Boppana
2005	J	`jnl`	Transistor-Level Optimization of Digital Designs with Flex Cells. Computer Rob Roy, Debashis Bhattacharya, Vamsi Boppana
2004	A*	`conf`	Accurate pre-layout estimation of standard cell characteristics. DAC Hiroaki Yoshida, Kaushik De, Vamsi Boppana
2003	J	`jnl`	Fault equivalence identification in combinational circuits using implication and evaluation techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. M. Enamul Amyeen, W. Kent Fuchs, Irith Pomeranz, Vamsi Boppana
2002	—	`conf`	Design for Verification at the Register Transfer Level. ASP-DAC/VLSI Design Indradeep Ghosh, Krishna Sekar, Vamsi Boppana
2001	—	`conf`	Cellular automata as a built in self test structure. ASP-DAC Biplab K. Sikdar, Debesh K. Das, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee, Parimal Pal Chaudhuri
2001	Misc	`conf`	Fault Equivalence Identification Using Redundancy Information and Static and Dynamic Extraction. VTS M. Enamul Amyeen, W. Kent Fuchs, Irith Pomeranz, Vamsi Boppana
2001	J	`jnl`	Fault-diagnosis-based technique for establishing RTL and gate-levelcorrespondences. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srivaths Ravi, Indradeep Ghosh, Vamsi Boppana, Niraj K. Jha
2000	C	`conf`	A Technique for Identifying RTL and Gate-Level Correspondences. ICCD Srivaths Ravi, Niraj K. Jha, Indradeep Ghosh, Vamsi Boppana
2000	Misc	`conf`	Hierarchical Error Diagnosis Targeting RTL Circuits. VLSI Design Vamsi Boppana, Indradeep Ghosh, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita
2000	Misc	`conf`	Testing, Verification, and Diagnosis in the Presence of Unknowns. VTS Ankur Jain, Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Michael S. Hsiao
2000	Misc	`conf`	Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. VLSI Design Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee
1999	Misc	`conf`	Implication and Evaluation Techniques for Proving Fault Equivalence. VTS M. Enamul Amyeen, W. Kent Fuchs, Irith Pomeranz, Vamsi Boppana
1999	A*	`conf`	Model Checking Based on Sequential ATPG. CAV Vamsi Boppana, Sreeranga P. Rajan, Koichiro Takayama, Masahiro Fujita
1999	A*	`conf`	Multiple Error Diagnosis Based on Xlists. DAC Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Pradeep Bollineni
1999	Misc	`conf`	On the Evaluation of Arbitrary Defect Coverage of Test Sets. VTS Ankur Jain, Michael S. Hsiao, Vamsi Boppana, Masahiro Fujita
1998	A	`conf`	Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits. ICCAD Vamsi Boppana, W. Kent Fuchs
1998	A	`conf`	Modeling the unknown! Towards model-independent fault and error diagnosis. ITC Vamsi Boppana, Masahiro Fujita
1997	Misc	`conf`	Characterization and Implicit Identification of Sequential Indistinguishability. VLSI Design Vamsi Boppana, Ismed Hartanto, W. Kent Fuchs
1997	Misc	`conf`	Diagnostic Test Pattern Generation for Sequential Circuits. VTS Ismed Hartanto, Vamsi Boppana, Janak H. Patel, W. Kent Fuchs
1997	—	`—`	State Information-Based Solutions for Sequential Circuit Diagnosis and Testing Vamsi Boppana
1996	—	`conf`	A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs. Euro-Par, Vol. I Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu
1996	A	`conf`	Diagnostic Fault Equivalence Identification Using Redundancy Information and Structural Analysis. ITC Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs
1996	—	`conf`	Fault Diagnosis Using State Information. FTCS Vamsi Boppana, Ismed Hartanto, W. Kent Fuchs
1996	Misc	`conf`	Full fault dictionary storage based on labeled tree encoding. VTS Vamsi Boppana, Ismed Hartanto, W. Kent Fuchs
1996	A	`conf`	Identification of unsettable flip-flops for partial scan and faster ATPG. ICCAD Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs
1996	A	`conf`	Integrated fault diagnosis targeting reduced simulation. ICCAD Vamsi Boppana, W. Kent Fuchs
1996	A	`conf`	Partial Scan Design Based on State Transition Modeling. ITC Vamsi Boppana, W. Kent Fuchs
1994	Misc	`conf`	A CAD Tool for Design of On-Chip Store & Generate Scheme. VLSI Design Sukumar Nandi, Vamsi Boppana, Parimal Pal Chaudhuri
1994	A	`conf`	Fault dictionary compaction by output sequence removal. ICCAD Vamsi Boppana, W. Kent Fuchs
1993	Misc	`conf`	Delay Fault Test Generation with Cellular Automata. VLSI Design Sukumar Nandi, Vamsi Boppana, Supratik Chakraborty, Parimal Pal Chaudhuri, Samir Roy