Valentin Muresan

15 papers A 1C 5Misc 3Journal 1Unranked 5

Year	Rank	Type	Title / Venue / Authors
2016	Misc	`conf`	Superior vision: Always on human-like vision for intelligent devices. SACI Valentin Muresan
2011	Misc	`conf`	Requirements of a real-time multiprocessor operating system for multimedia applications. SACI Valentin Stangaciu, Georgiana Macariu, Mihai V. Micea, Valentin Muresan, Brendan Barry
2006	C	`conf`	A low complexity hardware architecture for motion estimation. ISCAS Daniel Larkin, Valentin Muresan, Noel E. O'Connor
2006	—	`conf`	An Efficient Hardware Architecture for a Neural Network Activation Function Generator. ISNN (2) Daniel Larkin, Andrew Kinane, Valentin Muresan, Noel E. O'Connor
2006	—	`conf`	Optimisation of Constant Matrix Multiplication Operation Hardware Using a Genetic Algorithm. EvoWorkshops Andrew Kinane, Valentin Muresan, Noel E. O'Connor
2006	C	`conf`	Towards an optimised VLSI design algorithm for the constant matrix multiplication problem. ISCAS Andrew Kinane, Valentin Muresan, Noel E. O'Connor
2005	—	`conf`	FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator. FPT Andrew Kinane, Alan Casey, Valentin Muresan, Noel E. O'Connor
2004	—	`conf`	Energy-Efficient Hardware Architecture for Variable N-point 1D DCT. PATMOS Andrew Kinane, Valentin Muresan, Noel E. O'Connor, Noel Murphy, Seán Marlow
2004	J	`jnl`	Greedy Tree Growing Heuristics on Block-Test Scheduling Under Power Constraints. J. Electron. Test. Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2001	C	`conf`	Mixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints. IEEE International Workshop on Rapid System Prototyping Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000	A	`conf`	A comparison of classical scheduling approaches in power-constrained block-test scheduling. ITC Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000	—	`conf`	Distribution-graph based approach and extended tree growing technique in power-constrained block-test scheduling. Asian Test Symposium Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000	C	`conf`	Power-Constrained Block-Test List Scheduling. IEEE International Workshop on Rapid System Prototyping Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000	Misc	`conf`	The Left Edge Algorithm and the Tree Growing Technique in Block-Test Scheduling under Power Constraints. VTS Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000	C	`conf`	The left edge algorithm in block test scheduling under power constraints. ISCAS Valentin Muresan, Xiaojun Wang, Mircea Vladutiu