Vaibhav Venugopal Rao

13 papers C 3Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2026 J jnl
DNA: DC Nodal Analysis Attack for Evaluation of Analog Obfuscation Techniques.
ACM Trans. Design Autom. Electr. Syst.
Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis
2025 J jnl
Emerging ML-AI Techniques for Analog and RF EDA.
CoRR
Zhengfeng Wu, Ziyi Chen, Nnaemeka Achebe, Vaibhav Venugopal Rao, Pratik Shrestha, Ioannis Savidis
2024 C conf
DNA: DC Nodal Analysis Attack for Analog Circuits.
ISCAS
Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis
2023 J jnl
Hidden Costs of Analog Deobfuscation Attacks.
IEEE Trans. Very Large Scale Integr. Syst.
Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis
2022 — conf
Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated Circuits.
ISQED
Vaibhav Venugopal Rao, Avesta Sasan, Ioannis Savidis
2022 — conf
Practical Performance of Analog Attack Techniques.
HOST
Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis
2021 J jnl
Performance and Security Analysis of Parameter-Obfuscated Analog Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Vaibhav Venugopal Rao, Ioannis Savidis
2020 C conf
Security Vulnerabilities of Obfuscated Analog Circuits.
ISCAS
Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis
2019 C conf
Mesh Based Obfuscation of Analog Circuit Properties.
ISCAS
Vaibhav Venugopal Rao, Ioannis Savidis
2019 — conf
Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies.
ACM Great Lakes Symposium on VLSI
Kyle Juretus, Vaibhav Venugopal Rao, Ioannis Savidis
2018 — conf
Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory.
APCCAS
Vaibhav Venugopal Rao, Ioannis Savidis
2017 — conf
Parameter biasing obfuscation for analog IP protection.
HOST
Vaibhav Venugopal Rao, Ioannis Savidis
2017 — conf
Protecting analog circuits with parameter biasing obfuscation.
LATS
Vaibhav Venugopal Rao, Ioannis Savidis