Vacius Jusas

43 papers C 7Misc 1Journal 27Unranked 8
YearRankTypeTitle / Venue / Authors
2024 — conf
Comprehensive Analysis of Feature Extraction Methods for Emotion Recognition on Motor Imagery from Multichannel EEG Recordings.
WorldCIST (2)
Amr F. Mohamed, Vacius Jusas
2021 J jnl
Implementation Framework for a Blockchain-Based Federated Learning Model for Classification Problems.
Symmetry
Zeba Mahmood, Vacius Jusas
2020 J jnl
An Abstraction Based Approach for Reconstruction of TimeLine in Digital Forensics.
Symmetry
Sandeepak Bhandari, Vacius Jusas
2020 J jnl
An Ontology Based on the Timeline of Log2timeline and Psort Using Abstraction Approach in Digital Forensics.
Symmetry
Sandeepak Bhandari, Vacius Jusas
2020 C conf
The Phases Based Approach for Regeneration of Timeline in Digital Forensics.
INISTA
Sandeepak Bhandari, Vacius Jusas
2019 J jnl
Classification of Motor Imagery Using Combination of Feature Extraction and Reduction Methods for Brain-Computer Interface.
Inf. Technol. Control.
Vacius Jusas, Sam Gilvine Samuvel
2019 J jnl
Logical filter approach for early stage cyber-attack detection.
Comput. Sci. Inf. Syst.
Vacius Jusas, Saulius Japertas, Tautvydas Baksys, Sandeepak Bhandari
2019 J jnl
Robust Backstepping Sliding Mode Control with L2-Gain Performance for Reference Input Wheel Slip Tracking of Vehicle.
Inf. Technol. Control.
Vacius Jusas, Jiaxu Zhang, Jing Li
2018 J jnl
Black box delay fault models for non-scan sequential circuits.
Comput. Sci. Inf. Syst.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Liudas Motiejunas, Rimantas Seinauskas
2018 J jnl
Development of a Modular Board for EEG Signal Acquisition.
Sensors
Tomas Uktveris, Vacius Jusas
2017 J jnl
Application of Convolutional Neural Networks to Four-Class Motor Imagery Classification Problem.
Inf. Technol. Control.
Tomas Uktveris, Vacius Jusas
2017 Misc conf
Convolutional Neural Networks for Four-Class Motor Imagery Data Classification.
IDC
Tomas Uktveris, Vacius Jusas
2017 J jnl
Methodology to investigate BitTorrent sync protocol.
Comput. Sci. Inf. Syst.
Algimantas Venckauskas, Vacius Jusas, Kestutis Paulikas, Jevgenijus Toldinas
2017 J jnl
Methods and Tools of Digital Triage in Forensic Context: Survey and Future Directions.
Symmetry
Vacius Jusas, Darius Birvinskas, Elvar Gahramanov
2017 J jnl
Software Engineering Competence Remote Evaluation Process Model.
Balt. J. Mod. Comput.
Vacius Jusas, Joaquín Nicolás Ros, Boriss Misnevs
2016 J jnl
A Methodology and Tool for Investigation of Artifacts Left by the BitTorrent Client.
Symmetry
Algimantas Venckauskas, Vacius Jusas, Kestutis Paulikas, Jevgenijus Toldinas
2015 — conf
Comparison of Feature Extraction Methods for EEG BCI Classification.
ICIST
Tomas Uktveris, Vacius Jusas
2015 — conf
Energy Efficient Method for Motor Imagery Data Compression.
ICIST
Darius Birvinskas, Vacius Jusas
2015 J jnl
Fast DCT algorithms for EEG data compression in embedded systems.
Comput. Sci. Inf. Syst.
Darius Birvinskas, Vacius Jusas, Ignas Martisius, Robertas Damasevicius
2015 J jnl
Investigation of Artifacts Left by BitTorrent Client on the Local Computer Operating under Windows 8.1.
Inf. Technol. Control.
Algimantas Venckauskas, Vacius Jusas, Kestutis Paulikas, Jevgenijus Toldinas
2015 J jnl
Path delay test generation at functional level.
IET Comput. Digit. Tech.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2014 J jnl
Stimuli generation framework for testing multiple processes in VHDL.
Inf. Technol. Control.
Vacius Jusas, Tomas Neverdauskas
2014 — conf
Stimuli generator for testing processes in VHDL.
NORCHIP
Vacius Jusas, Tomas Neverdauskas
2013 J jnl
Combining Software and Hardware Test Generation Methods to Verify VHDL Models.
Inf. Technol. Control.
Vacius Jusas, Tomas Neverdauskas
2013 J jnl
Data compression of EEG signals for artificial neural network classification.
Inf. Technol. Control.
Darius Birvinskas, Vacius Jusas, Ignas Martisius, Robertas Damasevicius
2013 J jnl
Delay fault testing using partial multiple scan chains.
Microelectron. Reliab.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2013 C conf
EEG Dataset Reduction and Classification Using Wave Atom Transform.
ICANN
Ignas Martisius, Darius Birvinskas, Robertas Damasevicius, Vacius Jusas
2013 J jnl
Functional delay test generation approach using a software prototype of the circuit.
Comput. Sci. Inf. Syst.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2013 — conf
Novel Method to Generate Tests for VHDL.
ICIST
Vacius Jusas, Tomas Neverdauskas
2012 — conf
EEG Dataset Reduction and Feature Extraction Using Discrete Cosine Transform.
EMS
Darius Birvinskas, Vacius Jusas, Ignas Martisius, Robertas Damasevicius
2012 J jnl
Evaluation of testability enhancement using software prototype.
IET Comput. Digit. Tech.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2012 — conf
FSM Based Functional Test Generation Framework for VHDL.
ICIST
Vacius Jusas, Tomas Neverdauskas
2011 J jnl
Functional fault models for non-scan sequential circuits.
Microelectron. Reliab.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2009 J jnl
Functional delay test generation based on software prototype.
Microelectron. Reliab.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2008 C conf
Development of Functional Delay Tests.
DSD
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2008 J jnl
Test generation at the algorithm-level for gate-level fault coverage.
Microelectron. Reliab.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2007 J jnl
Functional Test Generation Based on Combined Random and Deterministic Search Methods.
Informatica
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2007 C conf
The Criteria of Functional Delay Test Quality Assessment.
DSD
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2007 C conf
Transition Faults Testing Based on Functional Delay Tests.
DDECS
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2006 C conf
Transition Fault Test Reuse.
DSD
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2005 C conf
Functional Test Generation Remote Tool.
DSD
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2005 J jnl
The Realization-Independent Testing Based on the Black Box Fault Models.
Informatica
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2001 — conf
Procedures for Selection of Validation Vectors on the Algorithm Level.
LATW
Vacius Jusas, Kestutis Paulikas, Rimantas Seinauskas