V. Lakshmana Gomathi Nayagam

22 papers B 2Journal 20
YearRankTypeTitle / Venue / Authors
2026 J jnl
Int. J. Reason. based Intell. Syst.
V. Lakshmana Gomathi Nayagam, Bharanidharan Ramalingam
2023 J jnl
Int. J. Comput. Intell. Syst.
V. Lakshmana Gomathi Nayagam, K. Suriyapriya, Jagadeeswari Murugan
2023 J jnl
Neural Comput. Appl.
S. Jeevaraj, R. Rajesh, V. Lakshmana Gomathi Nayagam
2022 J jnl
Soft Comput.
M. Kameswari, S. A. Mohiuddine, V. Lakshmana Gomathi Nayagam, K. Tamilvanan, N. Anbazhagan
2022 J jnl
Soft Comput.
M. Kameswari, S. A. Mohiuddine, V. Lakshmana Gomathi Nayagam, K. Tamilvanan, N. Anbazhagan
2022 J jnl
Int. J. Math. Oper. Res.
K. Suriyapriya, Jagadeeswari Murugan, V. Lakshmana Gomathi Nayagam
2021 J jnl
Discret. Math. Algorithms Appl.
A. Sadiquali, P. Arul Paul Sudhahar, V. Lakshmana Gomathi Nayagam
2020 J jnl
Comput. Appl. Math.
V. Lakshmana Gomathi Nayagam, Jagadeeswari Murugan, K. Suriyapriya
2020 J jnl
Neural Comput. Appl.
V. Lakshmana Gomathi Nayagam, Dhanasekaran Ponnialagan, S. Jeevaraj
2018 J jnl
Neural Comput. Appl.
V. Lakshmana Gomathi Nayagam, S. Jeevaraj, P. Dhanasekaran
2017 J jnl
Soft Comput.
V. Lakshmana Gomathi Nayagam, S. Jeevaraj, P. Dhanasekaran
2017 J jnl
Soft Comput.
V. Lakshmana Gomathi Nayagam, S. Jeevaraj, Geetha Sivaraman
2016 J jnl
J. Intell. Fuzzy Syst.
V. Lakshmana Gomathi Nayagam, P. Dhanasekaran, S. Jeevaraj
2016 J jnl
Expert Syst. Appl.
V. Lakshmana Gomathi Nayagam, S. Jeevaraj, P. Dhanasekaran
2016 J jnl
J. Intell. Fuzzy Syst.
V. Lakshmana Gomathi Nayagam, S. Jeevaraj, Geetha Sivaraman
2016 J jnl
Complex.
V. Lakshmana Gomathi Nayagam, S. Jeevaraj, Geetha Sivaraman
2014 J jnl
Expert Syst. Appl.
Geetha Sivaraman, V. Lakshmana Gomathi Nayagam, R. Ponalagusamy
2011 J jnl
Expert Syst. Appl.
V. Lakshmana Gomathi Nayagam, S. Muralikrishnan, Geetha Sivaraman
2011 J jnl
Appl. Soft Comput.
V. Lakshmana Gomathi Nayagam, Geetha Sivaraman
2008 B conf
FUZZ-IEEE
V. Lakshmana Gomathi Nayagam, David Gauld, Geetha Sivaraman, G. Venkateshwari
2008 B conf
FUZZ-IEEE
V. Lakshmana Gomathi Nayagam, G. Venkateshwari, Geetha Sivaraman
2007 J jnl
Int. J. Math. Math. Sci.
V. Lakshmana Gomathi Nayagam, Geetha Sivaraman
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False