V. K. Agrawal

19 papers Journal 12Unranked 7
YearRankTypeTitle / Venue / Authors
2017 — conf
Hardware implementation of support vector machine classifier using reconfigurable architecture.
ICACCI
Santosh Kumar, J. Manikandan, V. K. Agrawal
2015 — conf
Design and evaluation of FPGA based frequency demodulators.
ICACCI
Senthilkumar E., J. Manikandan, V. K. Agrawal
2014 — conf
FPGA implementation of dynamically tunable filters.
ICACCI
Senthilkumar E., J. Manikandan, V. K. Agrawal
2014 — conf
MATLAB-Based GUI Development for Stochastic Noise Analysis of Tri-Axial Gyroscopes.
ISED
A. Divya Rao, Piyush Kumar, Neha Nain, V. K. Agrawal
2013 — conf
Design and Evaluation of N-Module Reconfigurable Systems.
ICACNI
Kunal Yogeshkumar Parikh, J. Manikandan, V. K. Agrawal
2013 — conf
Design of a Biometric Security System Using Support Vector Machine Classifier.
ICACNI
J. Manikandan, V. K. Agrawal, B. Venkataramani
2008 J jnl
Software-Based Resolver-to-Digital Conversion Using a DSP.
IEEE Trans. Ind. Electron.
Santanu Sarma, V. K. Agrawal, Subramanya Udupa
2007 J jnl
A New ATPG Technique (ExpoTan) for Testing Analog Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
B. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal
2004 J jnl
A new ATPG technique (MultiDetect) for testing of analog macros in mixed-signal circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
B. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal
2004 J jnl
A simple scheme for PSK demodulation.
Microprocess. Microsystems
P. Balasubramanian, P. M. Aravindakshan, K. Parameswaran, V. K. Agrawal
2001 J jnl
An Efficient Test Pattern Generation Scheme for an On Chip BIST.
VLSI Design
B. K. S. V. L. Varaprasad, L. M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal
2001 J jnl
Genetic programming based pattern classification with feature space partitioning.
Inf. Sci.
J. K. Kishore, Lalit M. Patnaik, V. Mani, V. K. Agrawal
2000 J jnl
A hardware/software codesign for improved data acquisition in a processor based embedded system.
Microprocess. Microsystems
F. Thomas, M. M. Nayak, Subramanya Udupa, J. K. Kishore, V. K. Agrawal
2000 J jnl
Application of genetic programming for multicategory pattern classification.
IEEE Trans. Evol. Comput.
J. K. Kishore, Lalit M. Patnaik, V. Mani, V. K. Agrawal
1999 J jnl
Design and implementation of a wheel speed measurement circuit using field programmable gate arrays in a spacecraft.
Microprocess. Microsystems
F. Thomas, J. K. Kishore, K. M. Bharadwaj, M. M. Nayak, V. K. Agrawal
1994 — conf
A Real Time Fault Tolerant Microprocessor Based On-Board Computer System for INSAT-2 Spacecraft.
FTRTFT
J. K. Kishore, R. S. Manjunatha, V. K. Agrawal, N. K. Malik, Prem Shankar Goel
1991 J jnl
Extended colored Petri net: An efficient tool for analyzing concurrent systems.
Inf. Sci.
Sajal K. Das, Dilip Sarkar, V. K. Agrawal, Lalit M. Patnaik
1987 J jnl
Reflexive Incidence Matrix (RIM) Representation of Petri Nets.
IEEE Trans. Software Eng.
Sajal K. Das, V. K. Agrawal, Dilip Sarkar, Lalit M. Patnaik, Prem Shankar Goel
1985 J jnl
Towards formal specification of a distributed computing system.
Int. J. Parallel Program.
V. K. Agrawal, Lalit M. Patnaik, Prem Shankar Goel