Un-Ku Moon - RankMe

243 papers A* 1A 2C 51Misc 1Journal 84Unranked 104

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	32.2 A PVT-Robust Frequency-Scalable Fully Dynamic ΔΣ ADC with Bottom-Plate Level Shift. ISSCC Tohru Kaneko, Hideaki Ishida, Yuzuru Yamaki, Satoshi Takehara, Un-Ku Moon
2026	J	`jnl`	A Hybrid Voltage-Time Domain Pipelined ADC With Reference-Embedded Time-Domain Residues. IEEE J. Solid State Circuits Jae-Geun Lim, Jun-Ho Boo, Jae-Hyuk Lee, Hyoung-Jung Kim, Byeongho Yu, Kang-Il Cho, Sungho Lee, Un-Ku Moon, Gil-Cho Ahn
2025	J	`jnl`	An 89.5 dB SNDR 500 kHz BW Largely Passive Fourth-Order Noise-Coupled Delta-Sigma Modulator. IEEE Trans. Circuits Syst. I Regul. Pap. Hanyu Wang, Faraz Adin, Un-Ku Moon, Gabor C. Temes
2024	C	`conf`	An Easy-to-Drive Discrete-Time ADC Topology Using Digital Predictive Level-Shifting. ISCAS Manxin Li, Runpeng Gao, Calder Wilson, Amartya Basak, Evan C. Markwell, Matthew L. Johnston, Un-Ku Moon
2024	—	`conf`	Wideband Low-Distortion Noise-Coupled Delta-Sigma ADC. MWSCAS Hanyu Wang, Faraz Adin, Un-Ku Moon, Gabor C. Temes
2023	C	`conf`	A 16- Bit 100kHz Bandwidth Pseudo-Pseudo-Differential Delta-Sigma ADC. ISCAS Manxin Li, Calvin Yoji Lee, Hanyu Wang, Gabor C. Temes, Un-Ku Moon
2023	J	`jnl`	A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting. IEEE J. Solid State Circuits Manxin Li, Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon
2023	—	`conf`	A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting. ISSCC Manxin Li, Calvin Yoji Lee, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon
2023	—	`conf`	PLL-SAR: A New High-Speed Analog to Digital Converter Architecture. MWSCAS Vladimir Veselý, Calvin Yoji Lee, Tejasvi Anand, Un-Ku Moon
2022	—	`conf`	A 0.0375mm ISSCC Calvin Yoji Lee, Un-Ku Moon
2022	C	`conf`	Passive Third Order Continuous-Time ΔΣ Modulator with Q Enhancement Technique. ISCAS Hang Hu, Vladimir Veselý, Un-Ku Moon
2022	—	`conf`	Switched-Capacitor Circuits. CICC David J. Allstot, Un-Ku Moon, Gabor C. Temes
2022	C	`conf`	Ultra-Low OSR Calibration Free MASH Noise Shaping SAR ADC. ISCAS Hang Hu, Vladimir Veselý, Un-Ku Moon
2021	J	`jnl`	A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators. IEEE Trans. Circuits Syst. II Express Briefs Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Un-Ku Moon
2021	—	`conf`	Low-Distortion Correlated Level Shifting Sample-and-Hold Stage. NEWCAS Alexander Pierce, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes
2021	J	`jnl`	Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR. IEEE Trans. Circuits Syst. I Regul. Pap. Lukang Shi, Eashwar Thiagarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes
2020	J	`jnl`	A 77-dB-DR 0.65-mW 20-MHz 5th-Order Coupled Source Followers Based Low-Pass Filter. IEEE J. Solid State Circuits Yang Xu, Hang Hu, Jason Muhlestein, Un-Ku Moon
2020	J	`jnl`	A 951-fs IEEE J. Solid State Circuits Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon
2020	J	`jnl`	A Charge-Domain Switched-G IEEE Trans. Circuits Syst. I Regul. Pap. Yang Xu, Praveen Kumar Venkatachala, Yue Hu, Spencer Leuenberger, Gabor C. Temes, Un-Ku Moon
2020	—	`conf`	Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR. MWSCAS Lukang Shi, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes
2019	J	`jnl`	A 10-mW 16-b 15-MS/s Two-Step SAR ADC With 95-dB DR Using Dual-Deadzone Ring Amplifier. IEEE J. Solid State Circuits Ahmed ElShater, Praveen Kumar Venkatachala, Calvin Yoji Lee, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2019	—	`conf`	A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-Amplifier. ISSCC Ahmed ElShater, Calvin Yoji Lee, Praveen Kumar Venkatachala, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2019	—	`conf`	An 80mA Capacitor-Less LDO with 6.5µA Quiescent Current and No Frequency Compensation Using Adaptive-Deadzone Ring Amplifier. A-SSCC Bohui Xiao, Praveen Kumar Venkatachala, Yang Xu, Ahmed ElShater, Calvin Yoji Lee, Spencer Leuenberger, Qadeer Ahmad Khan, Un-Ku Moon
2019	C	`conf`	Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL. ISCAS Calvin Yoji Lee, Ahmed ElShater, Praveen Kumar Venkatachala, Hang Hu, Bohui Xiao, Un-Ku Moon
2019	C	`conf`	Cascoded Ring Amplifiers for High Speed and High Accuracy Settling. ISCAS Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Bohui Xiao, Hang Hu, Un-Ku Moon
2019	C	`conf`	Gm-Free Assisted Opamp Technique for Continuous Time Delta-Sigma Modulators. ISCAS Ahmed ElShater, Calvin Y. Lee, Praveen Kumar Venkatachala, Mohamed Dessouky, Un-Ku Moon
2019	J	`jnl`	Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Tao He, Manjunath Kareppagoudr, Yi Zhang, Emanuel Caceres, Un-Ku Moon, Gabor C. Temes
2019	C	`conf`	Simultaneous STF and NTF Estimation in CTΔΣ Modulators with ARMA-Model. ISCAS Hang Hu, Calvin Y. Lee, Ahmed ElShater, Zhiyuan Dai, Fan Ye, Un-Ku Moon
2018	C	`conf`	A Power Efficient SAR Algorithm for High Resolution ADCs. ISCAS Calvin Lee, Spencer Leuenberger, Praveen Kumar Venkatachala, Ahmed ElShater, Michael Oatman, Bohui Xiao, Un-Ku Moon
2018	C	`conf`	An Empirical Study of the Settling Performance of Ring Amplifiers for Pipelined ADCs. ISCAS Spencer Leuenberger, Praveen Kumar Venkatachala, Ahmed ElShater, Michael Oatman, Calvin Lee, Bohui Xiao, Un-Ku Moon
2018	J	`jnl`	An Oversampling Stochastic ADC Using VCO-Based Quantizers. IEEE Trans. Circuits Syst. I Regul. Pap. Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2018	C	`conf`	Passive Compensation for Improved Settling and Large Signal Stabilization of Ring Amplifiers. ISCAS Praveen Kumar Venkatachala, Spencer Leuenberger, Ahmed ElShater, Calvin Lee, Jason Muhlestein, Bohui Xiao, Michael Oatman, Un-Ku Moon
2018	C	`conf`	Power Optimized Comparator Selecting Method For Stochastic ADC. ISCAS Bohui Xiao, Spencer Leuenberger, Praveen Kumar Venkatachala, Ahmed ElShater, Calvin Lee, Michael Oatman, Un-Ku Moon
2018	C	`conf`	Process Invariant Biasing of Ring Amplifiers Using Deadzone Regulation Circuit. ISCAS Praveen Kumar Venkatachala, Spencer Leuenberger, Ahmed ElShater, Calvin Lee, Yang Xu, Bohui Xiao, Michael Oatman, Un-Ku Moon
2018	—	`conf`	Session 14 overview: High-resolution ADCs: Data converter subcommittee. ISSCC Matt Straayer, Seung-Tak Ryu, Un-Ku Moon
2018	—	`conf`	Session 22 overview: Gigahertz data converters: Data converter subcommittee. ISSCC Kostas Doris, Jan Westra, Un-Ku Moon
2017	—	`conf`	A 0.65mW 20MHz 5 CICC Yang Xu, Jason Muhlestein, Un-Ku Moon
2017	—	`conf`	A 0.951 psrms period jitter, 3.2% modulation range, DSM-free, spread-spectrum PLL. CICC Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon
2017	—	`conf`	A 73dB SNDR 20MS/s 1.28mW SAR-TDC using hybrid two-step quantization. CICC Jason Muhlestein, Spencer Leuenberger, Hyuk Sun, Yang Xu, Un-Ku Moon
2017	—	`conf`	A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier. CICC Spencer Leuenberger, Jason Muhlestein, Hyuk Sun, Praveen Kumar Venkatachala, Un-Ku Moon
2017	C	`conf`	A highly compact wideband continuous-time transimpedance low-pass filter. ISCAS Yang Xu, Praveen Kumar Venkatachala, Un-Ku Moon
2017	C	`conf`	A multi-path ring amplifier with dynamic biasing. ISCAS Jason Muhlestein, Farshad Farahbakhshian, Praveen Kumar Venkatachala, Un-Ku Moon
2017	—	`conf`	Pseudo-pseudo-differential circuits. MWSCAS Tao He, Manjunath Kareppagoudr, Un-Ku Moon, Gabor C. Temes, Yi Zhang
2017	—	`conf`	Session 16 overview: Gigahertz data converters. ISSCC Jan Mulder, Paul Ferguson, Un-Ku Moon
2017	—	`conf`	Session 28 overview: Hybrid ADCs. ISSCC Tai-Cheng Lee, Bob Verbruggen, Un-Ku Moon
2017	C	`conf`	Voltage domain correction technique for timing skew errors in time interleaved ADCs. ISCAS Praveen Kumar Venkatachala, Ahmed ElShater, Yang Xu, Manar El-Chammas, Un-Ku Moon
2016	—	`conf`	A 0.6mW 31MHz 4 VLSI Circuits Yang Xu, Spencer Leuenberger, Praveen Kumar Venkatachala, Un-Ku Moon
2016	—	`conf`	A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers. A-SSCC Hyuk Sun, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2016	C	`conf`	A power efficient PLL with in-loop-bandwidth spread-spectrum modulation scheme using a charge-based discrete-time loop filter. ISCAS Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2016	J	`jnl`	Analysis of Metastability Errors in Conventional, LSB-First, and Asynchronous SAR ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. Allen Waters, Jason Muhlestein, Un-Ku Moon
2016	—	`conf`	Data converter reflections: 19 papers from the last ten years that deserve a second look. ESSCIRC David Robertson, Aaron Buchwald, Michael Flynn, Hae-Seung Lee, Un-Ku Moon, Boris Murmann
2015	J	`jnl`	A Continuous-Time ΔΣ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation. IEEE Trans. Circuits Syst. II Express Briefs Yue Hu, Hariprasath Venkatram, Nima Maghari, Un-Ku Moon
2015	—	`conf`	A VCO-based spatial averaging stochastic ADC. ICECS Hyuk Sun, Jason Muhlestein, Un-Ku Moon
2015	—	`conf`	A fully automated verilog-to-layout synthesized ADC demonstrating 56dB-SNDR with 2MHz-BW. A-SSCC Allen Waters, Un-Ku Moon
2015	C	`conf`	A single OpAmp 2 ISCAS Spencer Leuenberger, Un-Ku Moon
2015	C	`conf`	A ΔΣ ADC using an LSB-first SAR quantizer. ISCAS Allen Waters, Jerry Leung, Manideep Gande, Un-Ku Moon
2015	—	`conf`	Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency. MWSCAS Yang Xu, Hyuk Sun, Un-Ku Moon
2015	—	`conf`	Analysis of metastability errors in asynchronous SAR ADCs. ICECS Allen Waters, Jason Muhlestein, Un-Ku Moon
2015	—	`conf`	Bit-error-rate analysis and mixed signal triple modular redundancy methods for data converters. ICECS Jason Muhlestein, Hariprasath Venkatram, Jon Guerber, Allen Waters, Un-Ku Moon
2015	C	`conf`	Highly linear continuous-time MASH ΔΣ ADC with dual VCO-based quantizers. ISCAS Yang Xu, Spencer Leuenberger, Un-Ku Moon
2015	—	`conf`	MDLL/PLL dual-path clock generator. MWSCAS Hyuk Sun, Un-Ku Moon
2015	—	`conf`	Practical modeling of comparator metastability for conventional and LSB-first SAR ADCs. MWSCAS Allen Waters, Un-Ku Moon
2015	C	`conf`	Selectable starting bit SAR ADC. ISCAS Jerry Leung, Allen Waters, Un-Ku Moon
2015	C	`conf`	Time-interleaved integrating quantizer incorporating channel coupling for speed and linearity enhancement. ISCAS Yue Hu, Spencer Leuenberger, Yang Xu, Un-Ku Moon
2014	—	`conf`	A 48 fJ/CS, 74 dB SNDR, 87 dB SFDR, 85 dB THD, 30 MS/s pipelined ADC using hybrid dynamic amplifier. VLSIC Hariprasath Venkatram, Taehwan Oh, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2014	J	`jnl`	A Time-Based Pipelined ADC Using Both Voltage and Time Domain Information. IEEE J. Solid State Circuits Taehwan Oh, Hariprasath Venkatram, Un-Ku Moon
2014	—	`conf`	Analysis and performance trade-offs of linearity calibration for stochastic ADCs. ICECS Allen Waters, Spencer Leuenberger, Farshad Farahbakhshian, Un-Ku Moon
2014	J	`jnl`	Blind Calibration Algorithm for Nonlinearity Correction Based on Selective Sampling. IEEE J. Solid State Circuits Manideep Gande, Hariprasath Venkatram, Ho-Young Lee, Jon Guerber, Un-Ku Moon
2014	J	`jnl`	Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells. IEEE Trans. Circuits Syst. I Regul. Pap. Skyler Weaver, Benjamin P. Hershberg, Un-Ku Moon
2014	—	`conf`	Emerging analog-to-digital converters. ESSCIRC Nima Maghari, Un-Ku Moon
2014	—	`conf`	Inherently linear time symmetric pulse width modulation. CICC Yue Hu, Yang Xu, Un-Ku Moon
2014	—	`conf`	LSB-first SAR ADC with bit-repeating for reduced energy consumption. ICECS Allen Waters, Jerry Leung, Un-Ku Moon
2014	—	`conf`	Resistive correction of low output impedance high-speed current-steering DACs. ICECS Spencer Leuenberger, Allen Waters, Un-Ku Moon
2014	—	`conf`	Stochastic approximation register ADC. NEWCAS Farshad Farahbakhshian, Allen Waters, Jason Muhlestein, Un-Ku Moon
2014	C	`conf`	Time amplifiers based on phase accumulation. ISCAS Yue Hu, Farshad Farahbakhshian, Un-Ku Moon
2013	J	`jnl`	A Second-Order ΔΣ ADC Using Noise-Shaped Two-Step Integrating Quantizer. IEEE J. Solid State Circuits Taehwan Oh, Nima Maghari, Un-Ku Moon
2013	C	`conf`	Analysis of back-end flash in a 1.5b/stage pipelined ADC. ISCAS Manideep Gande, Jon Guerber, Un-Ku Moon
2013	—	`conf`	Blind background calibration of harmonic distortion based on selective sampling. CICC Manideep Gande, Ho-Young Lee, Hariprasath Venkatram, Jon Guerber, Un-Ku Moon
2013	J	`jnl`	Detection and Correction Methods for Single Event Effects in Analog to Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. Hariprasath Venkatram, Jon Guerber, Manideep Gande, Un-Ku Moon
2013	J	`jnl`	Highly Linear Noise-Shaped Pipelined ADC Utilizing a Relaxed Accuracy Front-End. IEEE J. Solid State Circuits Omid Rajaee, Un-Ku Moon
2013	J	`jnl`	Message From the Outgoing Editor-in-Chief. IEEE J. Solid State Circuits Un-Ku Moon
2013	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Un-Ku Moon
2013	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Un-Ku Moon
2013	—	`conf`	Parallel gain enhancement technique for switched-capacitor circuits. CICC Hariprasath Venkatram, Benjamin P. Hershberg, Taehwan Oh, Manideep Gande, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2012	J	`jnl`	A 10-b Ternary SAR ADC With Quantization Time Information Utilization. IEEE J. Solid State Circuits Jon Guerber, Hariprasath Venkatram, Manideep Gande, Allen Waters, Un-Ku Moon
2012	—	`conf`	A 31.3fJ/conversion-step 70.4dB SNDR 30MS/s 1.2V two-step pipelined ADC in 0.13μm CMOS. ISSCC Ho-Young Lee, Bumha Lee, Un-Ku Moon
2012	—	`conf`	A 5MHz BW 70.7dB SNDR noise-shaped two-step quantizer based ΔΣ ADC. VLSIC Taehwan Oh, Nima Maghari, Un-Ku Moon
2012	—	`conf`	A 61.5dB SNDR pipelined ADC using simple highly-scalable ring amplifiers. VLSIC Benjamin P. Hershberg, Skyler Weaver, Kazuki Sobue, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon
2012	—	`conf`	A 71dB dynamic range third-order ΔΣ TDC using charge-pump. VLSIC Manideep Gande, Nima Maghari, Taehwan Oh, Un-Ku Moon
2012	C	`conf`	Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits. ISCAS Hariprasath Venkatram, Taehwan Oh, Jon Guerber, Un-Ku Moon
2012	C	`conf`	Correlated jitter sampling for jitter cancellation in pipelined TDC. ISCAS Taehwan Oh, Hariprasath Venkatram, Jon Guerber, Un-Ku Moon
2012	C	`conf`	Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm. ISCAS Jon Guerber, Hariprasath Venkatram, Taehwan Oh, Un-Ku Moon
2012	—	`conf`	Little-known features of well-known creatures. ISSCC Un-Ku Moon, Shanthi Pavan
2012	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Un-Ku Moon
2012	J	`jnl`	New Associate Editor. IEEE J. Solid State Circuits Un-Ku Moon
2012	J	`jnl`	New Associate Editors. IEEE J. Solid State Circuits Un-Ku Moon
2012	J	`jnl`	Rail-to-Rail Input Pipelined ADC Incorporating Multistage Signal Mapping. IEEE Trans. Circuits Syst. II Express Briefs Naga Sasidhar, David Gubbins, Pavan Kumar Hanumolu, Un-Ku Moon
2012	J	`jnl`	Ring Amplifiers for Switched Capacitor Circuits. IEEE J. Solid State Circuits Benjamin P. Hershberg, Skyler Weaver, Kazuki Sobue, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon
2012	—	`conf`	Ring amplifiers for switched-capacitor circuits. ISSCC Benjamin P. Hershberg, Skyler Weaver, Kazuki Sobue, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon
2012	J	`jnl`	The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping. IEEE Trans. Circuits Syst. I Regul. Pap. Jon Guerber, Manideep Gande, Un-Ku Moon
2012	C	`conf`	The effect of correlated level shifting on noise performance in switched capacitor circuits. ISCAS Benjamin P. Hershberg, Tawfiq Musah, Skyler Weaver, Un-Ku Moon
2012	Misc	`conf`	Tutorial T5: Advanced Analog-Mixed Signal System and Circuit Techniques. VLSI Design Pavan Kumar Hanumolu, Un-Ku Moon, Terri S. Fiez
2011	—	`conf`	A 0.7V 810µW 10b 30MS/s comparator-based two-step pipelined ADC. CICC Ho-Young Lee, David Gubbins, Bumha Lee, Un-Ku Moon
2011	—	`conf`	A 10b Ternary SAR ADC with decision time quantization based redundancy. A-SSCC Jon Guerber, Manideep Gande, Hariprasath Venkatram, Allen Waters, Un-Ku Moon
2011	—	`conf`	A 30% beyond VDD signal swing 9-ENOB pipelined ADC using a 1.2V 30dB loop-gain opamp. A-SSCC B. Robert Gregoire, Tawfiq Musah, Nima Maghari, Skyler Weaver, Un-Ku Moon
2011	J	`jnl`	A Third-Order DT ΔΣ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer. IEEE J. Solid State Circuits Nima Maghari, Un-Ku Moon
2011	—	`conf`	A third-order DT ΔΣ modulator using noise-shaped bidirectional single-slope quantizer. ISSCC Nima Maghari, Un-Ku Moon
2011	J	`jnl`	Analysis of Residue Integration Sampling With Improved Jitter Immunity. IEEE Trans. Circuits Syst. II Express Briefs Taehwan Oh, Nima Maghari, David Gubbins, Un-Ku Moon
2011	C	`conf`	Binary Access Memory: An optimized lookup table for successive approximation applications. ISCAS Benjamin P. Hershberg, Skyler Weaver, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon
2011	J	`jnl`	Design-Oriented Analysis of Circuits With Equality Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2011	J	`jnl`	Domino-Logic-Based ADC for Digital Synthesis. IEEE Trans. Circuits Syst. II Express Briefs Skyler Weaver, Benjamin P. Hershberg, Nima Maghari, Un-Ku Moon
2011	J	`jnl`	Low-OSR Over-Ranging Hybrid ADC Incorporating Noise-Shaped Two-Step Quantizer. IEEE J. Solid State Circuits Omid Rajaee, Seiji Takeuchi, Mitsuru Aniya, Koichi Hamashita, Un-Ku Moon
2010	—	`conf`	A +5dBFS third-order extended dynamic range single-loop ΔΣ modulator. CICC Nima Maghari, Skyler Weaver, Un-Ku Moon
2010	—	`conf`	A 1.4V signal swing hybrid CLS-opamp/ZCBC pipelined ADC using a 300mV output swing opamp. ISSCC Benjamin P. Hershberg, Skyler Weaver, Un-Ku Moon
2010	C	`conf`	A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer. ISCAS Nima Maghari, Un-Ku Moon
2010	J	`jnl`	An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS. IEEE J. Solid State Circuits Charles T. Peach, Un-Ku Moon, David J. Allstot
2010	C	`conf`	An interstage correlated double sampling technique for switched-capacitor gain stages. ISCAS Omid Rajaee, Yue Hu, Manideep Gande, Tawfiq Musah, Un-Ku Moon
2010	—	`conf`	Asynchronous CLS for Zero Crossing based Circuits. ICECS Hariprasath Venkatram, Benjamin P. Hershberg, Un-Ku Moon
2010	J	`jnl`	Continuous-Time Input Pipeline ADCs. IEEE J. Solid State Circuits David Gubbins, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon
2010	J	`jnl`	Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC. IEEE J. Solid State Circuits Omid Rajaee, Tawfiq Musah, Nima Maghari, Seiji Takeuchi, Mitsuru Aniya, Koichi Hamashita, Un-Ku Moon
2010	J	`jnl`	Design of a Split-CLS Pipelined ADC With Full Signal Swing Using an Accurate But Fractional Signal Swing Opamp. IEEE J. Solid State Circuits Benjamin P. Hershberg, Skyler Weaver, Un-Ku Moon
2010	—	`conf`	PDF folding for stochastic flash ADCs. ICECS Skyler Weaver, Benjamin P. Hershberg, Un-Ku Moon
2010	C	`conf`	Precise area-controlled return-to-zero current steering DAC with reduced sensitivity to clock jitter. ISCAS Nima Maghari, Un-Ku Moon
2010	C	`conf`	Pseudo-differential zero-crossing-based circuit with differential error suppression. ISCAS Tawfiq Musah, Un-Ku Moon
2010	J	`jnl`	Stochastic Flash Analog-to-Digital Conversion. IEEE Trans. Circuits Syst. I Regul. Pap. Skyler Weaver, Benjamin P. Hershberg, Peter Kurahashi, Daniel Knierim, Un-Ku Moon
2009	J	`jnl`	74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain. IEEE J. Solid State Circuits Nima Maghari, Sunwoo Kwon, Un-Ku Moon
2009	J	`jnl`	A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver. IEEE J. Solid State Circuits Kyehyung Lee, Qingdong Meng, Tetsuro Sugimoto, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Un-Ku Moon, Gabor C. Temes
2009	J	`jnl`	A 10 MS/s 11-bit 0.19 mm IEEE J. Solid State Circuits Min-Gyu Kim, Pavan Kumar Hanumolu, Un-Ku Moon
2009	—	`conf`	A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS. CICC Tawfiq Musah, Sunwoo Kwon, Hasnain Lakdawala, Krishnamurthy Soumyanath, Un-Ku Moon
2009	J	`jnl`	A Digital PLL With a Stochastic Time-to-Digital Converter. IEEE Trans. Circuits Syst. I Regul. Pap. Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kerem Ok, Un-Ku Moon, Kartikeya Mayaram
2009	J	`jnl`	A Low Power Pipelined ADC Using Capacitor and Opamp Sharing Technique With a Scheme to Cancel the Effect of Signal Dependent Kickback. IEEE J. Solid State Circuits Naga Sasidhar, Youn-Jae Kook, Seiji Takeuchi, Koichi Hamashita, Kaoru Takasuka, Pavan Kumar Hanumolu, Un-Ku Moon
2009	—	`conf`	A continuous-time input pipeline ADC with inherent anti-alias filtering. CICC David Gubbins, Sunwoo Kwon, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon
2009	—	`conf`	A multiplexer-based digital passive linear counter (PLINCO). ICECS Skyler Weaver, Benjamin P. Hershberg, Pavan Kumar Hanumolu, Un-Ku Moon
2009	—	`conf`	An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. CICC Sunwoo Kwon, Pavan Kumar Hanumolu, Sang-Ho Kim, Sung-No Lee, Seung-Bin You, Ho-Jin Park, Jae-Whui Kim, Un-Ku Moon
2009	J	`jnl`	Automated Design and Optimization of Low-Noise Oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2009	J	`jnl`	Guest Editorial Special Issue on ISCAS 2008. IEEE Trans. Circuits Syst. I Regul. Pap. Anthony Chan Carusone, Yehea Ismail, Un-Ku Moon, Hanspeter Schmid, Wouter A. Serdijn, Gianluca Setti
2009	J	`jnl`	Introducing Jump-Start Tutorials. IEEE Trans. Circuits Syst. II Express Briefs Anthony Chan Carusone, Un-Ku Moon
2009	J	`jnl`	Method for a Constant Loop Bandwidth in LC-VCO PLL Frequency Synthesizers. IEEE J. Solid State Circuits Ting Wu, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon
2008	—	`conf`	74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using 35dB opamp gain. CICC Nima Maghari, Sunwoo Kwon, Un-Ku Moon
2008	J	`jnl`	A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC. IEEE J. Solid State Circuits Min-Gyu Kim, Gil-Cho Ahn, Pavan Kumar Hanumolu, Sanghyeon Lee, Sang-Ho Kim, Seung-Bin You, Jae-Whui Kim, Gabor C. Temes, Un-Ku Moon
2008	—	`conf`	A 1V downconversion filter using duty-cycle controlled bandwidth tuning. CICC Peter Kurahashi, Pavan Kumar Hanumolu, Un-Ku Moon
2008	J	`jnl`	A Note From the Editors. IEEE Trans. Circuits Syst. II Express Briefs Gianluca Setti, Un-Ku Moon
2008	J	`jnl`	A Sub-Picosecond Resolution 0.5-1.5 GHz Digital-to-Phase Converter. IEEE J. Solid State Circuits Pavan Kumar Hanumolu, Volodymyr Kratyuk, Gu-Yeon Wei, Un-Ku Moon
2008	J	`jnl`	A Wide-Tracking Range Clock and Data Recovery Circuit. IEEE J. Solid State Circuits Pavan Kumar Hanumolu, Gu-Yeon Wei, Un-Ku Moon
2008	—	`conf`	A continuous-time input pipeline ADC. CICC David Gubbins, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon
2008	J	`jnl`	An Over-60 dB True Rail-to-Rail Performance Using Correlated Level Shifting and an Opamp With Only 30 dB Loop Gain. IEEE J. Solid State Circuits B. Robert Gregoire, Un-Ku Moon
2008	—	`conf`	An Over-60dB True Rail-to-Rail Performance Using Correlated Level Shifting and an Opamp with 30dB Loop Gain. ISSCC B. Robert Gregoire, Un-Ku Moon
2008	C	`conf`	Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer. ISCAS Omid Rajaee, Un-Ku Moon
2008	C	`conf`	Multi-loop efficient sturdy MASH delta-sigma modulators. ISCAS Nima Maghari, Un-Ku Moon
2008	—	`conf`	Noise tolerant oscillator design using perturbation projection vector analysis. CICC Igor Vytyaz, Josh Carnes, Ting Wu, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2008	C	`conf`	Parameter variation analysis for voltage controlled oscillators in phase-locked loops. ISCAS Igor Vytyaz, David C. Lee, Un-Ku Moon, Kartikeya Mayaram
2008	A	`conf`	Periodic Steady-State Analysis Augmented with Design Equality Constraints. DATE Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2008	C	`conf`	Reducing the effects of component mismatch by using relative size information. ISCAS B. Robert Gregoire, Un-Ku Moon
2008	J	`jnl`	Sensitivity Analysis for Oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2007	—	`conf`	A 0.6GHz to 2GHz Digital PLL with Wide Tracking Range. CICC Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon
2007	—	`conf`	A 1V 10b 30MSPS Switched-RC Pipelined ADC. CICC Gil-Cho Ahn, Min-Gyu Kim, Pavan Kumar Hanumolu, Un-Ku Moon
2007	—	`conf`	A 3.2Gb/s Oversampling CDR with Improved Jitter Tolerance. CICC Merrick Brownlee, Pavan Kumar Hanumolu, Un-Ku Moon
2007	—	`conf`	A 4.2 GHz PLL Frequency Synthesizer with an Adaptively Tuned Coarse Loop. CICC Ting Wu, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon
2007	J	`jnl`	A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy. IEEE Trans. Circuits Syst. II Express Briefs Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2007	C	`conf`	A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement. ISCAS Sunwoo Kwon, Un-Ku Moon
2007	J	`jnl`	A Sub 1-V Constant G IEEE Trans. Circuits Syst. II Express Briefs B. Robert Gregoire, Un-Ku Moon
2007	—	`conf`	An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers. ICECS Ranganathan Desikachari, Mark Steeds, Jeffrey M. Huard, Un-Ku Moon
2007	J	`jnl`	An On-chip Calibration Technique for Reducing Supply Voltage Sensitivity in Ring Oscillators. IEEE J. Solid State Circuits Ting Wu, Kartikeya Mayaram, Un-Ku Moon
2007	—	`conf`	Design Considerations for Stochastic Analog-to-Digital Conversion. ICECS Skyler Weaver, Daniel Knierim, Roland Wazenried, Un-Ku Moon
2007	—	`conf`	Design and Analysis of Noise Tolerant Ring Oscillators Using Maneatis Delay Cells. ICECS Josh Carnes, Igor Vytyaz, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon
2007	J	`jnl`	Design of Low-Voltage Highly Linear Switched-R-MOSFET-C Filters. IEEE J. Solid State Circuits Peter Kurahashi, Pavan Kumar Hanumolu, Gabor C. Temes, Un-Ku Moon
2007	—	`conf`	Digitally-Enhanced Phase-Locking Circuits. CICC Pavan Kumar Hanumolu, Gu-Yeon Wei, Un-Ku Moon, Kartikeya Mayaram
2007	—	`conf`	Low-Power and High-Speed Pipelined ADC Using Time-Aligned CDS Technique. CICC Youn-Jae Kook, Jipeng Li, Bumha Lee, Un-Ku Moon
2007	C	`conf`	Mixed-Order Sturdy MASH Delta-Sigma Modulator. ISCAS Nima Maghari, Sunwoo Kwon, Gabor C. Temes, Un-Ku Moon
2007	A*	`conf`	Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency. DAC Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram
2007	C	`conf`	Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency. ISCAS Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram
2007	C	`conf`	Process-Independent Resistor Temperature-Coefficients using Series/Parallel and Parallel/Series Composite Resistors. ISCAS B. Robert Gregoire, Un-Ku Moon
2007	A	`conf`	Sensitivity analysis for oscillators. ICCAD Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2007	—	`conf`	State-of-the-art continuous-time filters from scratch. ICECS Un-Ku Moon
2007	—	`conf`	Time-Shifted CDS Enhancement of Comparator-Based MDAC for Pipelined ADC Applications. ICECS Omid Rajaee, Nima Maghari, Un-Ku Moon
2006	—	`conf`	A 0.5 to 2.5GHz PLL with Fully Differential Supply-Regulated Tuning. ISSCC Merrick Brownlee, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon
2006	J	`jnl`	A 0.5-GHz to 2.5-GHz PLL With Fully Differential Supply Regulated Tuning. IEEE J. Solid State Circuits Merrick Brownlee, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon
2006	—	`conf`	A 0.6V Highly Linear Switched-R-MOSFET-C Filter. CICC Peter Kurahashi, Pavan Kumar Hanumolu, Gabor C. Temes, Un-Ku Moon
2006	—	`conf`	A 1.6Gbps Digital Clock and Data Recovery Circuit. CICC Pavan Kumar Hanumolu, Min-Gyu Kim, Gu-Yeon Wei, Un-Ku Moon
2006	J	`jnl`	Comments on 'Split ADC' architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC". IEEE J. Solid State Circuits Jipeng Li, Un-Ku Moon, John A. McNeill, Michael C. W. Coln, Brian J. Larivee
2006	C	`conf`	Constant transconductance bias circuit with an on-chip resistor. ISCAS Nasser Talebbeydokhti, Pavan Kumar Hanumolu, Peter Kurahashi, Un-Ku Moon
2006	C	`conf`	Dependence of LC VCO oscillation frequency on bias current. ISCAS Ting Wu, Un-Ku Moon, Kartikeya Mayaram
2006	C	`conf`	The effect of switch resistance on pipelined ADC MDAC settling time. ISCAS Josh Carnes, Un-Ku Moon
2005	J	`jnl`	A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators. IEEE J. Solid State Circuits Gil-Cho Ahn, Dong-Young Chang, Matthew E. Brown, Naoto Ozaki, Hiroshi Youra, Ken Yamamura, Koichi Hamashita, Kaoru Takasuka, Gábor C. Temes, Un-Ku Moon
2005	J	`jnl`	A 0.8-V accurately tuned linear continuous-time filter. IEEE J. Solid State Circuits Gowtham Vemulapalli, Pavan Kumar Hanumolu, Youn-Jae Kook, Un-Ku Moon
2005	J	`jnl`	A 0.9-V 12-mW 5-MSPS algorithmic ADC with 77-dB SFDR. IEEE J. Solid State Circuits Jipeng Li, Gil-Cho Ahn, Dong-Young Chang, Un-Ku Moon
2005	—	`conf`	A 10-bit algorithmic A/D converter for cytosensor application. ISCAS (6) Thirumalai Rengachari, Vivek Sharma, Gabor C. Temes, Un-Ku Moon
2005	—	`conf`	A generic multilevel multiplying D/A converter for pipelined ADCs. ISCAS (6) Vivek Sharma, Un-Ku Moon, Gabor C. Temes
2005	—	`conf`	A low spur fractional-N frequency synthesizer architecture. ISCAS (3) Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2005	J	`jnl`	A low-Voltage 10-bit CMOS DAC in 0.01-mm IEEE Trans. Circuits Syst. II Express Briefs Brandon Greenley, Raymond Veith, Dong-Young Chang, Un-Ku Moon
2005	J	`jnl`	A time-delay jitter-insensitive continuous-time bandpass ΔΣ modulator architecture. IEEE Trans. Circuits Syst. II Express Briefs Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon
2005	—	`conf`	An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applications. ISCAS (4) Ting Wu, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram
2005	—	`conf`	Analysis of supply and ground noise sensitivity in ring and LC oscillators. ISCAS (6) Volodymyr Kratyuk, Igor Vytyaz, Un-Ku Moon, Kartikeya Mayaram
2005	J	`jnl`	Noise-shaping techniques applied to switched-capacitor voltage regulators. IEEE J. Solid State Circuits Arun Rao, William McIntyre, Un-Ku Moon, Gábor C. Temes
2005	J	`jnl`	Sub-1-V design techniques for high-linearity multistage/pipelined analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. Dong-Young Chang, Gil-Cho Ahn, Un-Ku Moon
2005	—	`conf`	Will continued process-node shrinks kill high-performance analog design? CICC Jafar Savoj, David Rich, Brett Forejt, Peter R. Kinget, Un-Ku Moon, Modest M. Oprysko, Behzad Razavi, Hisashi (Sam) Shichijo, Albert Z. Wang
2004	—	`conf`	A 0.8V accurately-tuned continuous-time filter. CICC Gowtham Vemulapalli, Pavan Kumar Hanumolu, Un-Ku Moon
2004	J	`jnl`	A 1.8-V 67-mW 10-bit 100-MS/s pipelined ADC using time-shifted CDS technique. IEEE J. Solid State Circuits Jipeng Li, Un-Ku Moon
2004	J	`jnl`	A 2.5-V 10-b 120-MSample/s CMOS pipelined ADC based on merged-capacitor switching. IEEE Trans. Circuits Syst. II Express Briefs Sang-Min Yoo, Jong-Bum Park, Seung-Hoon Lee, Un-Ku Moon
2004	—	`conf`	A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications. ISCAS (1) Shelly Xiao, José B. Silva, Un-Ku Moon, Gabor C. Temes
2004	—	`conf`	An improved algorithmic ADC clocking scheme. ISCAS (1) Min-Gyu Kim, Gil-Cho Ahn, Un-Ku Moon
2004	J	`jnl`	Analysis of charge-pump phase-locked loops. IEEE Trans. Circuits Syst. I Regul. Pap. Pavan Kumar Hanumolu, Merrick Brownlee, Kartikeya Mayaram, Un-Ku Moon
2004	J	`jnl`	CMOS implementation of nonlinear spectral-line timing recovery in digital data-communication systems. IEEE Trans. Circuits Syst. I Regul. Pap. Un-Ku Moon, Gang Huang
2004	J	`jnl`	Continuous-time filter design optimized for reduced die area. IEEE Trans. Circuits Syst. II Express Briefs Charles Myers, Brandon Greenley, Daniel Thomas, Un-Ku Moon
2004	—	`conf`	Experimental verification of a correlation-based correction algorithm for multi-bit delta-sigma ADCs. CICC Xuesheng Wang, Yuhua Guo, Un-Ku Moon, Gabor C. Temes
2004	—	`conf`	Jitter in high-speed serial and parallel links. ISCAS (4) Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon
2004	—	`conf`	Low-distortion delta-sigma topologies for MASH architectures. ISCAS (1) José B. Silva, Un-Ku Moon, Gabor C. Temes
2004	J	`jnl`	Radix-based digital calibration techniques for multi-stage recycling pipelined ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. Dong-Young Chang, Jipeng Li, Un-Ku Moon
2003	J	`jnl`	A 1.4-V 10-bit 25-MS/s pipelined ADC using opamp-reset switching technique. IEEE J. Solid State Circuits Dong-Young Chang, Un-Ku Moon
2003	—	`conf`	A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique. CICC Jipeng Li, Un-Ku Moon
2003	—	`conf`	An extended radix-based digital calibration technique for multi-stage ADC. ISCAS (1) Jipeng Li, Un-Ku Moon
2003	J	`jnl`	Analysis of PLL clock jitter in high-speed serial links. IEEE Trans. Circuits Syst. II Express Briefs Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon
2003	J	`jnl`	Background calibration techniques for multistage pipelined ADCs with digital redundancy. IEEE Trans. Circuits Syst. II Express Briefs Jipeng Li, Un-Ku Moon
2003	—	`conf`	Continuous-time, frequency translating, bandpass delta-sigma modulator. ISCAS (1) Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon
2002	J	`jnl`	A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset op amps. IEEE J. Solid State Circuits Mustafa Keskin, Un-Ku Moon, Gabor C. Temes
2002	—	`conf`	A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR. CICC Sang-Min Yoo, Tae-Hwan Oh, Jung-Woong Moon, Seung-Hoon Lee, Un-Ku Moon
2002	J	`jnl`	A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation. VLSI Design Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes
2002	J	`jnl`	A two-chip interface for a MEMS accelerometer. IEEE Trans. Instrum. Meas. Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes
2002	—	`conf`	An adaptive PAM-4 5 Gb/s backplane transceiver in 0.25 μm CMOS. CICC Jeff L. Sonntag, John T. Stonick, James Gorecki, Bill Beale, Bill Check, Xue-Mei Gong, Joe Guiliano, Kyong Lee, Bob Lefferts, David A. Yokoyama-Martin, Un-Ku Moon, Amber Sengir, Stephen Titus, Gu-Yeon Wei, Daniel Weinlader, Yaohua Yang
2002	—	`conf`	Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop. ISCAS (4) Arun Rao, William McIntyre, J. Parry, Un-Ku Moon, Gabor C. Temes
2002	—	`conf`	Digital correlation technique for the estimation and correction of DAC errors in multibit mash Delta-Sigma ADCs. ISCAS (4) X. Wang, Un-Ku Moon, M. Liu, Gabor C. Temes
2002	—	`conf`	Digital techniques for improved ΔΣ data conversion. CICC José Silva, Xuesheng Wang, Peter Kiss, Un-Ku Moon, Gabor C. Temes
2002	—	`conf`	High-speed pipelined A/D converter using time-shifted CDS technique. ISCAS (1) Jipeng Li, Un-Ku Moon
2002	—	`conf`	Low-voltage pipelined ADC using opamp-reset switching technique. CICC Dong-Young Chang, Lei Wu, Un-Ku Moon
2001	—	`conf`	A 1.8 V CMOS DAC cell with ultra high gain op-amp in 0.0143 mm2. ISCAS (1) Brandon Greenley, Un-Ku Moon, Raymond Veith
2001	—	`conf`	Area efficient CMOS charge pump circuits. ISCAS (1) Ryan Perigny, Un-Ku Moon, Gabor C. Temes
2001	—	`conf`	Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator. ISCAS (1) Mustafa Keskin, Un-Ku Moon, Gabor C. Temes
2001	—	`conf`	Multibit Sigma-Delta ADC with mixed-mode DAC error correction. ISCAS (1) Peter Kiss, Un-Ku Moon, Jesper Steensgaard, John T. Stonick, Gabor C. Temes
2000	J	`jnl`	A CMOS self-calibrating frequency synthesizer. IEEE J. Solid State Circuits William B. Wilson, Un-Ku Moon, Kadaba R. Lakshmikumar, Liang Dai
2000	C	`conf`	A noise-shaping accelerometer interface circuit for two-chip implementation. ISCAS Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes
2000	C	`conf`	A switched-capacitor DAC with analog mismatch correction. ISCAS Un-Ku Moon, José Silva, Jesper Steensgaard, Gabor C. Temes
2000	C	`conf`	An adaptive offset cancellation mixer for direct conversion receivers in 2.4 GHz CMOS. ISCAS Mark Lehne, John T. Stonick, Un-Ku Moon
2000	J	`jnl`	CMOS high-frequency switched-capacitor filters for telecommunication applications. IEEE J. Solid State Circuits Un-Ku Moon
2000	J	`jnl`	Correction to "CMOS high-frequency switched-capacitor filters for telecommunication applications". IEEE J. Solid State Circuits Un-Ku Moon
2000	C	`conf`	Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages. ISCAS Lei Wu, Mustafa Keskin, Un-Ku Moon, Gabor C. Temes
2000	C	`conf`	Efficient error-cancelling algorithmic ADC. ISCAS Zhilliang Zheng, Byung-Moo Min, Un-Ku Moon, Gabor C. Temes
2000	C	`conf`	Improved adaptive digital compensation for cascaded ΔΣ ADCs. ISCAS Peter Kiss, José Silva, Un-Ku Moon, John T. Stonick, Gabor C. Temes
1999	—	`conf`	Capacitor mismatch error cancellation technique for a successive approximation A/D converter. ISCAS (2) Zhiliang Zheng, Un-Ku Moon, Jesper Steensgaard, Bo Wang, Gabor C. Temes
1999	J	`jnl`	Digital techniques for improving the accuracy of data converters. IEEE Commun. Mag. Un-Ku Moon, Gabor C. Temes, Jesper Steensgaard
1999	—	`conf`	Low-voltage switched-capacitor circuits. ISCAS (2) E. Bidari, Mustafa Keskin, Franco Maloberti, Un-Ku Moon, Jesper Steensgaard, Gabor C. Temes
1999	—	`conf`	Mismatch-shaping serial digital-to-analog converter. ISCAS (2) Jesper Steensgaard, Un-Ku Moon, Gabor C. Temes
1993	J	`jnl`	Design of a low-distortion 22-kHz fifth-order Bessel filter. IEEE J. Solid State Circuits Un-Ku Moon, Bang-Sup Song
1993	C	`conf`	Low-distortion Continuous-time R-MOSFET-C Filters. ISCAS Un-Ku Moon, Bang-Sup Song