Ulrich Kleine - RankMe

27 papers A 2C 1Misc 2Journal 9Unranked 13

Year	Rank	Type	Title / Venue / Authors
2009	—	`conf`	Design of a complementary folded-cascode operational amplifier. SoCC Björn Lipka, Ulrich Kleine, Christoph Scheytt, Klaus Schmalz
2007	—	`conf`	Design of a Linear Power Amplifier with +/-1.5V Power Supply Using ALADIN. PATMOS Björn Lipka, Ulrich Kleine
2006	J	`jnl`	An automated design tool for analog layouts. IEEE Trans. Very Large Scale Integr. Syst. Lihong Zhang, Ulrich Kleine, Yingtao Jiang
2006	J	`jnl`	Placement Algorithm in Analog-Layout Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lihong Zhang, Rabin Raut, Yingtao Jiang, Ulrich Kleine
2005	J	`jnl`	A hybrid evolutionary analogue module placement algorithm for integrated circuit layout designs. Int. J. Circuit Theory Appl. Lihong Zhang, Rabin Raut, Yingtao Jiang, Ulrich Kleine, Yoohwan Kim
2005	J	`jnl`	Macro-cell placement for analog physical designs using a hybrid genetic algorithm with simulated annealing. Integr. Comput. Aided Eng. Lihong Zhang, Rabin Raut, Yingtao Jiang, Ulrich Kleine, Yoohwan Kim
2004	—	`conf`	A novel analog layout synthesis tool. ISCAS (5) Lihong Zhang, Ulrich Kleine
2004	J	`jnl`	A programmable inductive position sensor interface circuit. Integr. Falk Roewer, Ulrich Kleine, Klaus-Eberhard Salzwedel, Felix Mednikov, Chhrisitan Pfaffinger, Martin Sellen
2002	—	`conf`	A genetic approach to analog module placement with simulated annealing. ISCAS (1) Lihong Zhang, Ulrich Kleine
2002	Misc	`conf`	A novel algorithm for detection of rapid approaching objects. ICASSP Falk Roewer, Ulrich Kleine
2002	J	`jnl`	A novel class of complementary folded-cascode opamps for low voltage. IEEE J. Solid State Circuits Falk Roewer, Ulrich Kleine
2002	—	`conf`	Mismatch optimization for analog circuits using the DesignAssistant. ICECS Ulrich Kleine, Lihong Zhang, Markus Wolf
2001	—	`conf`	An efficient and precise design method to optimize device areas in mismatch and flicker-noise sensitive analog circuits. ICECS Christian Paulus, Ralf Brederlow, Ulrich Kleine, Roland Thewes
2000	—	`conf`	A new design rule description for automated layout tools. ICECS Lihong Zhang, Ulrich Kleine, Tobias Rudolph, Markus Wolf
2000	A	`conf`	Area Optimization of Analog Circuits Considering Matching Constraints. DATE Christian Paulus, Ulrich Kleine, Roland Thewes
1999	—	`conf`	Reliability driven module generation for analog layouts. ISCAS (6) Markus Wolf, Ulrich Kleine
1998	—	`conf`	A Novel Design Assistant for Analog Circuits. ASP-DAC Markus Wolf, Ulrich Kleine, Frédéric Schafer
1998	—	`conf`	A low voltage differential OpAmp with novel common mode feedback. ICECS Thomas Pasch, Ulrich Kleine, R. Klinke
1998	A	`conf`	Automatic Topology Optimization for Analog Module Generators. DATE Markus Wolf, Ulrich Kleine
1998	—	`conf`	Low-voltage medium Q-SC filters for high frequency communication applications. ICECS Ulrich Kleine, T. Pasch
1997	—	`conf`	Application independent module generation in analog layouts. ED&TC Markus Wolf, Ulrich Kleine
1996	—	`conf`	A Novel Analog Module Generator Environment. ED&TC Markus Wolf, Ulrich Kleine, Bedrich J. Hosticka
1996	J	`jnl`	Large bandwidth BiCMOS operational amplifiers for SC video applications. IEEE J. Solid State Circuits Gerhard Nebel, Ulrich Kleine, Hans-Jörg Pfleiderer
1995	J	`jnl`	Symbolic pole/zero calculation using SANTAFE. IEEE J. Solid State Circuits Gerhard Nebel, Ulrich Kleine, Hans-Jörg Pfleiderer
1994	J	`jnl`	A low-noise CMOS preamplifier operating at 4.2 K. IEEE J. Solid State Circuits Ulrich Kleine, Johannes Bieger, Heinrich Seifert
1994	C	`conf`	Large Bandwidth BiCMOS Operational Amplifiers for SC-Video-Applications. ISCAS Gerhard Nebel, Ulrich Kleine, Hans-Jörg Pfleiderer
1989	Misc	`conf`	Two-dimensional FIR filter architectures based on NTT. ICASSP Ulrich Kleine, Erik De Man