Ulrich Brenner

24 papers A* 1A 2Journal 15Unranked 4

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Bounds on soft rectangle packing ratios. Comput. Geom. Judith Brecklinghaus, Ulrich Brenner, Oliver Kiss
2024	J	`jnl`	Delay-Optimum Adder Circuits with Linear Size. CoRR Ulrich Brenner, Benjamin David Görg
2024	J	`jnl`	Faster Linear-Size And-Or Path and Adder Circuits. CoRR Ulrich Brenner, Anna Silvanus
2023	J	`jnl`	BonnLogic: Delay optimization by And-Or Path restructuring. Integr. Ulrich Brenner, Anna Silvanus
2022	J	`jnl`	Constructing depth-optimum circuits for adders and And-Or paths. Discret. Appl. Math. Ulrich Brenner, Anna Silvanus, Jannik Silvanus
2022	—	`conf`	Delay Optimization of Combinational Logic by AND-OR Path Restructuring. ASP-DAC Ulrich Brenner, Anna Silvanus
2020	J	`jnl`	Constructing Depth-Optimum Circuits for Adders and AND-OR Paths. CoRR Ulrich Brenner, Anna Hermann, Jannik Silvanus
2020	J	`jnl`	Delay Optimization of Combinational Logic by And-Or Path Restructuring. CoRR Ulrich Brenner, Anna Hermann
2019	J	`jnl`	Faster Carry Bit Computation for Adder Circuits with Prescribed Arrival Times. ACM Trans. Algorithms Ulrich Brenner, Anna Hermann
2017	J	`jnl`	Faster Adder Circuits for Inputs with Prescribed Arrival Times. CoRR Ulrich Brenner, Anna Hermann
2015	—	`conf`	BonnPlace: A Self-Stabilizing Placement Framework. ISPD Ulrich Brenner, Anna Hermann, Nils Hoppmann, Philipp Ochsendorf
2013	J	`jnl`	BonnPlace Legalization: Minimizing Movement by Iterative Augmentation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ulrich Brenner
2012	A	`conf`	VLSI legalization with minimum perturbation by iterative augmentation. DATE Ulrich Brenner
2008	J	`jnl`	A faster polynomial algorithm for the unbalanced Hitchcock transportation problem. Oper. Res. Lett. Ulrich Brenner
2008	—	`ch.`	Analytical Methods in Placement. Handbook of Algorithms for Physical Design Automation Ulrich Brenner, Jens Vygen
2008	J	`jnl`	BonnPlace: Placement of Leading-Edge Chips by Advanced Combinatorial Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ulrich Brenner, Markus Struzyna, Jens Vygen
2006	—	`—`	Theory and Practice of VLSI Placement Ulrich Brenner
2005	A*	`conf`	Faster and better global placement by a new transportation algorithm. DAC Ulrich Brenner, Markus Struzyna
2004	—	`conf`	Almost optimum placement legalization by minimum cost flow and dynamic programming. ISPD Ulrich Brenner, Anna Pauli, Jens Vygen
2004	J	`jnl`	Legalizing a placement with minimum total movement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ulrich Brenner, Jens Vygen
2003	J	`jnl`	An effective congestion-driven placement framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ulrich Brenner, André Rohe
2002	—	`conf`	An effective congestion driven placement framework. ISPD Ulrich Brenner, André Rohe
2001	J	`jnl`	Worst-case ratios of networks in the rectilinear plane. Networks Ulrich Brenner, Jens Vygen
2000	A	`conf`	Faster Optimal Single-Row Placement with Fixed Ordering. DATE Ulrich Brenner, Jens Vygen