Ujjwal Guin - RankMe

74 papers A* 2A 1C 3Misc 13Journal 40Unranked 15

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	SecureRAG-RTL: A Retrieval-Augmented, Multi-Agent, Zero-Shot LLM-Driven Framework for Hardware Vulnerability Detection. CoRR Touseef Hasan, Blessing Airehenbuwa, Nitin Pundir, Souvika Sarkar, Ujjwal Guin
2025	J	`jnl`	Advancing Security with Digital Twins: A Comprehensive Survey. CoRR Blessing Airehenbuwa, Touseef Hasan, Souvika Sarkar, Ujjwal Guin
2025	—	`conf`	Reward-Based Blockchain Infrastructure for 3D Ic Supply Chain Provenance. HOST Sulyab Thottungal Valapu, Aritri Saha, Bhaskar Krishnamachari, Vivek V. Menon, Ujjwal Guin
2025	J	`jnl`	Understanding the Security Landscape of Embedded Non-Volatile Memories: A Comprehensive Survey. CoRR Zakia Tamanna Tisha, Ujjwal Guin
2024	Misc	`conf`	A Novel Self-referencing Approach Using Memory Power-up States for Detecting COTS SRAMs. VTS Gaines Odom, Zakia Tamanna Tisha, Ujjwal Guin
2024	—	`conf`	Blockchain-Enabled Whitelisting Mechanisms for Enhancing Security in 3D ICs. ACM Great Lakes Symposium on VLSI Gaines Odom, Hardhik Mohanty, Ujjwal Guin, Bhaskar Krishnamachari
2024	—	`conf`	Exploring Security Solutions and Vulnerabilities for Embedded Non-Volatile Memories. ISVLSI Zakia Tamanna Tisha, Jeremy Muldavin, Ujjwal Guin
2024	A	`conf`	Optimizing Supply Chain Management using Permissioned Blockchains. ICCAD Aritri Saha, Ujjwal Guin
2024	J	`jnl`	Reward-based Blockchain Infrastructure for 3D IC Supply Chain Provenance. CoRR Sulyab Thottungal Valapu, Aritri Saha, Bhaskar Krishnamachari, Vivek V. Menon, Ujjwal Guin
2023	J	`jnl`	A Comprehensive Test Pattern Generation Approach Exploiting the SAT Attack for Logic Locking. IEEE Trans. Computers Yadi Zhong, Ujjwal Guin
2023	J	`jnl`	Complexity Analysis of the SAT Attack on Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yadi Zhong, Ujjwal Guin
2023	—	`conf`	On-Demand Device Authentication using Zero-Knowledge Proofs for Smart Systems. ACM Great Lakes Symposium on VLSI Yadi Zhong, Joshua Hovanes, Ujjwal Guin
2022	J	`jnl`	A Comprehensive Test Pattern Generation Approach Exploiting SAT Attack for Logic Locking. CoRR Yadi Zhong, Ujjwal Guin
2022	J	`jnl`	A Systematic Bit Selection Method for Robust SRAM PUFs. J. Electron. Test. Wendong Wang, Adit D. Singh, Ujjwal Guin
2022	J	`jnl`	AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking. CoRR Yadi Zhong, Ujjwal Guin
2022	J	`jnl`	AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking. J. Electron. Test. Yadi Zhong, Ayush Jain, M. Tanjidur Rahman, Navid Asadizanjani, Jiafeng Xie, Ujjwal Guin
2022	J	`jnl`	Beware of Discarding Used SRAMs: Information is Stored Permanently. CoRR Joshua Hovanes, Yadi Zhong, Ujjwal Guin
2022	A*	`conf`	CamSkyGate: camouflaged skyrmion gates for protecting ICs. DAC Yuqiao Zhang, Chunli Tang, Peng Li, Ujjwal Guin
2022	—	`conf`	Chosen-Plaintext Attack on Energy-Efficient Hardware Implementation of GIFT-COFB. HOST Yadi Zhong, Ujjwal Guin
2022	J	`jnl`	Complexity Analysis of the SAT Attack on Logic Locking. CoRR Yadi Zhong, Ujjwal Guin
2022	Misc	`conf`	Fault Modeling and Test Generation for Technology-Specific Defects of Skyrmion Logic Circuits. VTS Ziqi Zhou, Ujjwal Guin, Peng Li, Vishwani D. Agrawal
2022	—	`conf`	Fault-Injection Based Chosen-Plaintext Attacks on Multicycle AES Implementations. ACM Great Lakes Symposium on VLSI Yadi Zhong, Ujjwal Guin
2022	J	`jnl`	Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator. IEEE Comput. Archit. Lett. Benjamin J. Lucas, Ali Alwan, Marion Murzello, Yazheng Tu, Pengzhou He, Andrew J. Schwartz, David Guevara, Ujjwal Guin, Kyle Juretus, Jiafeng Xie
2022	J	`jnl`	Test and Yield Loss Reduction of AI and Deep Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mehdi Sadi, Ujjwal Guin
2021	—	`conf`	A Blockchain-based Contactless Delivery System for Addressing COVID-19 and Other Pandemics. Blockchain Pratiksha Mittal, Austin Walthall, Pinchen Cui, Anthony Skjellum, Ujjwal Guin
2021	J	`jnl`	A novel topology-guided attack and its countermeasure towards secure logic locking. J. Cryptogr. Eng. Yuqiao Zhang, Ayush Jain, Pinchen Cui, Ziqi Zhou, Ujjwal Guin
2021	Misc	`conf`	Defect Characterization and Testing of Skyrmion-Based Logic Circuits. VTS Ziqi Zhou, Ujjwal Guin, Peng Li, Vishwani D. Agrawal
2021	J	`jnl`	Estimating Operational Age of an Integrated Circuit. J. Electron. Test. Prattay Chowdhury, Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal
2021	J	`jnl`	Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography. IEEE J. Emerg. Sel. Topics Circuits Syst. Pengzhou He, Ujjwal Guin, Jiafeng Xie
2021	Misc	`conf`	Special Session: Reliability Analysis for AI/ML Hardware. VTS Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin
2021	J	`jnl`	Special Session: Reliability Analysis for ML/AI Hardware. CoRR Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin
2021	C	`conf`	Survey of Recent Developments for Hardware Trojan Detection. ISCAS Ayush Jain, Ziqi Zhou, Ujjwal Guin
2021	J	`jnl`	TAAL: Tampering Attack on Any Key-based Logic Locked Circuits. ACM Trans. Design Autom. Electr. Syst. Ayush Jain, Ziqi Zhou, Ujjwal Guin
2020	—	`conf`	A Novel Tampering Attack on AES Cores with Hardware Trojans. ITC-Asia Ayush Jain, Ujjwal Guin
2020	J	`jnl`	A Novel Tampering Attack on AES Cores with Hardware Trojans. CoRR Ayush Jain, Ujjwal Guin
2020	J	`jnl`	A Novel Topology-Guided Attack and Its Countermeasure Towards Secure Logic Locking. CoRR Yuqiao Zhang, Ayush Jain, Pinchen Cui, Ziqi Zhou, Ujjwal Guin
2020	J	`jnl`	A Robust, Low-Cost and Secure Authentication Scheme for IoT Applications. Cryptogr. Md Jubayer al Mahmod, Ujjwal Guin
2020	Misc	`conf`	A Zero-Cost Detection Approach for Recycled ICs using Scan Architecture. VTS Wendong Wang, Ujjwal Guin, Adit D. Singh
2020	J	`jnl`	ATPG-Guided Fault Injection Attacks on Logic Locking. CoRR Ayush Jain, M. Tanjidur Rahman, Ujjwal Guin
2020	J	`jnl`	Aging-Resilient SRAM-based True Random Number Generator for Lightweight Devices. J. Electron. Test. Wendong Wang, Ujjwal Guin, Adit D. Singh
2020	J	`jnl`	Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks
2020	J	`jnl`	End-to-End Traceability of ICs in Component Supply Chain for Fighting Against Recycling. IEEE Trans. Inf. Forensics Secur. Yuqiao Zhang, Ujjwal Guin
2020	Misc	`conf`	Special Session: Novel Attacks on Logic-Locking. VTS Ayush Jain, Ujjwal Guin, M. Tanjidur Rahman, Navid Asadizanjani, Danielle Duvalsaint, R. D. Shawn Blanton
2020	Misc	`conf`	Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography. VTS Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin
2020	J	`jnl`	Yield Loss Reduction and Test of AI and Deep Learning Accelerators. CoRR Mehdi Sadi, Ujjwal Guin
2019	J	`jnl`	A Blockchain-Based Framework for Supply Chain Provenance. IEEE Access Pinchen Cui, Julie Dixon, Ujjwal Guin, Daniel DiMase
2019	J	`jnl`	Blockchain in IoT: Current Trends, Challenges, and Future Roadmap. J. Hardw. Syst. Secur. Pinchen Cui, Ujjwal Guin, Anthony Skjellum, David A. Umphress
2019	—	`conf`	Countering Botnet of Things using Blockchain-Based Authenticity Framework. ISVLSI Pinchen Cui, Ujjwal Guin
2019	—	`conf`	Detecting Recycled SoCs by Exploiting Aging Induced Biases in Memory Cells. HOST Ujjwal Guin, Wendong Wang, Charles Harper, Adit D. Singh
2019	J	`jnl`	Low-Cost and Secure Firmware Obfuscation Method for Protecting Electronic Systems From Cloning. IEEE Internet Things J. Benjamin Cyr, Jubayer Mahmod, Ujjwal Guin
2019	Misc	`conf`	Special Session: Delay Fault Testing - Present and Future. VTS Jubayer Mahmod, Spencer K. Millican, Ujjwal Guin, Vishwani D. Agrawal
2019	J	`jnl`	Standards for Hardware Security. GetMobile Mob. Comput. Commun. Ujjwal Guin, Navid Asadizanjani, Mark Tehranipoor
2019	J	`jnl`	TAAL: Tampering Attack on Any Key-based Logic Locked Circuits. CoRR Ayush Jain, Ziqi Zhou, Ujjwal Guin
2019	—	`conf`	TGA: An Oracle-less and Topology-Guided Attack on Logic Locking. ASHES@CCS Yuqiao Zhang, Pinchen Cui, Ziqi Zhou, Ujjwal Guin
2019	Misc	`conf`	Two-Pattern ∆IDDQ Test for Recycled IC Detection. VLSID Prattay Chowdhury, Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal
2018	Misc	`conf`	A Secure Low-Cost Edge Device Authentication Scheme for the Internet of Things. VLSID Ujjwal Guin, Adit D. Singh, Mahabubul Alam, Janice Canedo, Anthony Skjellum
2018	—	`conf`	Ensuring Proof-of-Authenticity of IoT Edge Devices Using Blockchain Technology. iThings/GreenCom/CPSCom/SmartData Ujjwal Guin, Pinchen Cui, Anthony Skjellum
2018	—	`conf`	Exploiting power supply ramp rate for calibrating cell strength in SRAM PUFs. LATS Wendong Wang, Adit D. Singh, Ujjwal Guin, Abhijit Chatterjee
2018	Misc	`conf`	Modeling and test generation for combinational hardware Trojans. VTS Ziqi Zhou, Ujjwal Guin, Vishwani D. Agrawal
2018	J	`jnl`	Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test. IEEE Trans. Very Large Scale Integr. Syst. Ujjwal Guin, Ziqi Zhou, Adit D. Singh
2018	—	`conf`	Robust, low-cost, and accurate detection of recycled ICs using digital signatures. HOST Mahabubul Alam, Sreeja Chowdhury, Mark Tehranipoor, Ujjwal Guin
2017	Misc	`conf`	A novel design-for-security (DFS) architecture to prevent unauthorized IC overproduction. VTS Ujjwal Guin, Ziqi Zhou, Adit D. Singh
2017	J	`jnl`	SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware. IEEE Trans. Dependable Secur. Comput. Ujjwal Guin, Swarup Bhunia, Domenic Forte, Mark Tehranipoor
2017	J	`jnl`	TSensors Vision, Infrastructure and Security Challenges in Trillion Sensor Era. J. Hardw. Syst. Secur. Mahabubul Alam, Mark Tehranipoor, Ujjwal Guin
2016	J	`jnl`	Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling. IEEE Trans. Very Large Scale Integr. Syst. Ujjwal Guin, Domenic Forte, Mark Tehranipoor
2016	J	`jnl`	FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs. ACM Trans. Design Autom. Electr. Syst. Ujjwal Guin, Qihang Shi, Domenic Forte, Mark Tehranipoor
2015	C	`conf`	Performance optimization for on-chip sensors to detect recycled ICs. ICCD Bicky Shakya, Ujjwal Guin, Mark Tehranipoor, Domenic Forte
2014	J	`jnl`	A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment. J. Electron. Test. Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor
2014	J	`jnl`	Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris
2014	J	`jnl`	Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead. J. Electron. Test. Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor
2014	A*	`conf`	Low-cost On-Chip Structures for Combating Die and IC Recycling. DAC Ujjwal Guin, Xuehui Zhang, Domenic Forte, Mohammad Tehranipoor
2013	—	`conf`	Anti-counterfeit Techniques: From Design to Resign. MTV Ujjwal Guin, Domenic Forte, Mohammad Tehranipoor
2013	C	`conf`	Functional Fmax test-time reduction using novel DFTs for circuit initialization. ICCD Ujjwal Guin, Tapan J. Chakraborty, Mohammad Tehranipoor
2011	Misc	`conf`	Design for Bit Error Rate estimation of high speed serial links. VTS Ujjwal Guin, Chen-Huan Chiang