Tzung-Je Lee

61 papers C 5Journal 26Unranked 30
YearRankTypeTitle / Venue / Authors
2025 C conf
98.9% Efficiency Fully-integrated GaN Driver for Underwater Wireless Charging Application.
ISCAS
Tzung-Je Lee, Yi-Ting Deng, Jyu-Heng Chen
2024 J jnl
A 1-6.5 Gbps dual-loop CDR design with Coarse-fine Tuning VCO and modified DQFD.
Microelectron. J.
Chua-Chin Wang, L. S. S. Pavan Kumar Chodisetti, Bo-Hao Liao, Pradyumna Vellanki, Tzung-Je Lee
2024 — conf
A 23.9 ppm/°C Bandgap Reference Circuit with Wide Temperature Range Using Subthreshold PVT Detector.
APCCAS
Tzung-Je Lee, Ruei-Chi Lai, Aleksandr Vasjanov, Vaidotas Barzdenas
2024 C conf
A 3.2-GHz 0.3/0.5 V 16-nm FinFET I/O Buffer With Low-Power PVT Compensation Circuit.
ISCAS
Tzung-Je Lee, Ji-Hau Chiou
2024 J jnl
A 6-Gbps 16-nm FinFET CMOS I/O Buffer With Variation Insensitivity Ensured by Genetic Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chua-Chin Wang, L. S. S. Pavan Kumar Chodisetti, Jhih-Ying Ke, Cheng-Yao Lo, Tzung-Je Lee, Lean Karlo Santos Tolentino
2024 — conf
A Cap-less LDO Regulator with Improved Load Regulation using Adaptive Feedback Control and Modified Voltage Damper.
ISOCC
Tzung-Je Lee, Han Yi Chiu
2024 — conf
A High Gain Range Low Gain Step dB-Linear Programmable Gain Amplifier with Parallel Complementary Switching Current Method.
APCCAS
Tzung-Je Lee, Chien-Hsiang Chao
2024 — conf
GA-Optimized 6.0-Gbps DDR5 SDRAM I/O Buffer Design for 16-nm FinFET CMOS Process.
AICAS
Jhih-Ying Ke, Lean Karlo Santos Tolentino, Cheng-Yao Lo, Tzung-Je Lee, Chua-Chin Wang
2024 J jnl
High efficiency active rectifier with low-power self-biased comparator for low-frequency piezoelectric vibration energy harvesting of AUV.
Microelectron. J.
Tzung-Je Lee, Yu-Wei Liu
2024 — conf
Low-Power Frequency-Mode Temperature Sensing Circuit with Subthreshold Operational Amplifier.
ISOCC
Tzung-Je Lee, Po-Hsuan Hsiao
2024 — conf
Optimal Efficiency True Random Number Generator with Discrete-time Chaos for Low-Cost Applications.
ISOCC
Tzung-Je Lee, Cheng-Han Wu
2023 — conf
10-bit 250-KS/s M-2M Digital-to-Analog Converter with 4-4-2 Segmentation for Sonar System.
ISOCC
Tzung-Je Lee, Kuo-Hsun Tu
2023 C conf
3.2 Gbps Output Driver With Dual Low Voltage Modes and Low Power PVT Compensation Circuit.
ISCAS
Tzung-Je Lee, Shih-Hsien Kuo
2023 C conf
91.282% Efficiency SIDO Buck-Buck Converter with Separate Positive and Negative Output Voltage in 40 nm CMOS Process.
ISCAS
Tzung-Je Lee, Ding-Ze Chang
2023 J jnl
A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder.
Circuits Syst. Signal Process.
Chua-Chin Wang, Oliver Lexter July A. Jose, Wen-Shou Yang, Ralph Gerard B. Sangalang, Lean Karlo S. Tolentino, Tzung-Je Lee
2023 — conf
A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process.
APCCAS
Jhih-Ying Ke, Lean Karlo S. Tolentino, Cheng-Yao Lo, Tzung-Je Lee, Chua-Chin Wang
2023 J jnl
A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process.
Integr.
Chua-Chin Wang, Lean Karlo S. Tolentino, Shao-Wei Lu, Oliver Lexter July A. Jose, Ralph Gerard B. Sangalang, Tzung-Je Lee, Pang-Yen Lou, Wei-Chih Chang
2023 — conf
A High Dynamic-Range Readout Circuit with Differential Resistance-to-Time Conversion for Gas Sensor.
NEWCAS
Tzung-Je Lee, Meng-Lin Tsai
2023 — conf
High Bandwidth Efficiency FPGA-based Underwater Acoustic Transceiver with Adaptive-SFDR DDFS.
ISOCC
Tzung-Je Lee, Hung-Hsiang Chang, Chien-Hsiang Chao
2023 J jnl
High-Sensitivity PTAT Current Generator Using PTAT and CTAT Current Subtraction Method for Temperature Sensor With Frequency Output.
IEEE Trans. Circuits Syst. II Express Briefs
Tzung-Je Lee, Kuo-Hsun Tu
2023 — conf
Real-time IR Image Processing Interface on FPGA with Histogram Equalization and Non-Uniform Correction.
ICCE-Taiwan
Tzung-Je Lee, Yu-Wei Liu, Yu-Cheng Lin
2023 — conf
Temperature Sensor with 292.3 nA/°C Sensitivity Using Double Current Subtraction.
ISOCC
Tzung-Je Lee, Yin-Wen Lo
2023 — conf
±3 A Bidirectional Current Sensor for 57.6 V Li-ion Battery Management System of AUV.
ICCE-Taiwan
Tzung-Je Lee, Hsieng-Han Chen
2022 — conf
Fast-Transient LDO Regulator with RC-less Low-Impedance Buffer and PVT Compensation.
ISOCC
Tzung-Je Lee, Hung-Hsiang Chang
2022 — conf
Wide Dynamic Range Temperature Sensor Using High Sensitivity PTAT Current Generator.
ISOCC
Tzung-Je Lee, Kuo-Hsun Tu
2022 — conf
Wide Lock-in Range CDR with Modified DQFD and Coarse-fine Tuning Technique.
ICICDT
Tzung-Je Lee, Bo-Hao Liao, Chua-Chin Wang
2021 — conf
12 V PZE Harvesting Circuit For AUV Using Boost Converter with Resistor Matching Controller.
ISOCC
Tzung-Je Lee, Yu-Wei Liu
2021 J jnl
2˟VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process.
Circuits Syst. Signal Process.
Chua-Chin Wang, Pang-Yen Lou, Tsung-Yi Tsai, Yan-You Chou, Tzung-Je Lee
2021 — conf
A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment.
APCCAS
Tzung-Je Lee, Wen-Jian Su, Lean Karlo S. Tolentino, Chua-Chin Wang
2021 — conf
A 20 GHz 8-bit All-N-Transistor Logic CLA Using 16-nm FinFET Technology.
APCCAS
Tzung-Je Lee, Wen-Shou Yang, Chua-Chin Wang
2021 J jnl
An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-μm HV CMOS.
Microelectron. J.
Chua-Chin Wang, Oliver Lexter July A. Jose, Po-Kai Su, Lean Karlo S. Tolentino, Ralph Gerard B. Sangalang, Jessica Velasco, Tzung-Je Lee
2021 J jnl
High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors.
Circuits Syst. Signal Process.
Chua-Chin Wang, Pang-Yen Lou, Tsung-Yi Tsai, I-Yu Huang, Yu-Cheng Lin, Tzung-Je Lee, Guan-Ru Chen
2020 J jnl
A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique.
IEEE Trans. Circuits Syst.
Tzung-Je Lee, Ssu-Wei Huang, Chua-Chin Wang
2019 J jnl
500 MHz 90 nm CMOS 2 \(\times \) VDD Digital Output Buffer Immunity to Process and Voltage Variations.
Circuits Syst. Signal Process.
Chua-Chin Wang, Tsung-Yi Tsai, Yu-Lin Deng, Tzung-Je Lee
2019 J jnl
A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method.
IEEE Trans. Circuits Syst. II Express Briefs
Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U. Fat Chio, Chua-Chin Wang
2019 C conf
High Efficiency Buck Converter with Wide Load Current Range using Dual-Mode of PWM and PSM.
ISCAS
Tzung-Je Lee, Chia-Hsin Hsu, Chua-Chin Wang
2018 J jnl
Delay-Time-Compensated Peak Detector for Medium-Frequency Band.
Circuits Syst. Signal Process.
Tzung-Je Lee, Wei-Chih Hsiao
2017 J jnl
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer.
IEEE Trans. Very Large Scale Integr. Syst.
Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U-Fat Chio, Chua-Chin Wang
2017 — conf
HV voltage sensor for 16 series li-ion battery cells using chopper stabilized amplifier.
ISOCC
Tzung-Je Lee, Guan-Jhang Li
2016 — conf
16 Series Li-ion battery cells current sensor.
ICCE-TW
Tzung-Je Lee, Wun-Cing Yu, You-Ting Liu
2016 — conf
HV switch using differential voltage shaping driver for 13 series li-ion battery cells BMS.
ISOCC
Tzung-Je Lee
2016 J jnl
PVT-independent dB-linear reconfigured local-feedback digital variable gain amplifier.
Microelectron. J.
Tzung-Je Lee, Wei-Chih Hsiao
2015 J jnl
A ±3.07% frequency variation clock generator implemented using HV CMOS process.
Microelectron. J.
Chua-Chin Wang, Deng-Shian Wang, Tzu-Chiao Sung, Yi-Jie Hsieh, Tzung-Je Lee
2014 — conf
32% Slew rate and 27% data rate improved 2×VDD output buffer using PVTL compensation.
ICICDT
Tzung-Je Lee, Kai-Wei Ruan, Chua-Chin Wang
2014 J jnl
9.9 V ASK Demodulator Using Differential Shaper for High-Impedance Electrode.
Circuits Syst. Signal Process.
Tzung-Je Lee
2012 — conf
Linear programmable gain amplifier using reconfiguration local-feedback transconductors.
APCCAS
Tzung-Je Lee, Wen-Je Lu, Wei-Chih Hsiao, Chua-Chin Wang
2012 — conf
Temperature and process compensated clock generator using feedback TPC bias.
ICICDT
Tzung-Je Lee, Doron Shmilovitz, Yi-Jie Hsieh, Chua-Chin Wang
2010 J jnl
(1/3) times hboxVDD-to- (3/2) times hboxVDD Wide-Range I/O Buffer Using 0.35- muhboxm 3.3-V CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs
Chi-Chun Huang, Tzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang
2009 J jnl
Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tzung-Je Lee, Tieh-Yen Chang, Chua-Chin Wang
2008 J jnl
A 570-kbps ASK demodulator without external capacitors for low-frequency wireless bio-implants.
Microelectron. J.
Chua-Chin Wang, Tzung-Je Lee, U. Fat Chio, Yu-Tzu Hsiao, Jia-Jin Chen
2008 J jnl
A Phase-Locked Loop with 30% Jitter Reduction Using Separate Regulators.
VLSI Design
Tzung-Je Lee, Chua-Chin Wang
2008 J jnl
All-MOS ASK Demodulator for Low-Frequency Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Tzung-Je Lee, Ching-Li Lee, Yan-Jhin Ciou, Chi-Chun Huang, Chua-Chin Wang
2008 — conf
Mixed-voltage I/O buffer using 0.35 μm CMOS technology.
ICECS
Tzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang
2007 J jnl
Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator.
Microelectron. J.
Chua-Chin Wang, Tzung-Je Lee, Chih-Chen Li, Ron Hu
2006 — conf
A Linear LDO Regulator with Modified NMCF Frequency Compensation Independent of Off-chip Capacitor and ESR.
APCCAS
Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, U. Fat Chio
2006 — conf
An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity.
APCCAS
Chua-Chin Wang, Tzung-Je Lee, Chih-Chen Li, Ron Hu
2006 J jnl
An All-MOS High-Linearity Voltage-to-Frequency Converter Chip With 520-kHz/V Sensitivity.
IEEE Trans. Circuits Syst. II Express Briefs
Chua-Chin Wang, Tzung-Je Lee, Chih-Chen Li, Ron Hu
2006 — conf
An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording.
APCCAS
Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, Cheng-Mu Wu, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng, Jia-Jin Chen
2006 J jnl
High-sensitivity and high-mobility compact DVB-T receiver for in-car entertainment.
IEEE Trans. Consumer Electron.
Chua-Chin Wang, Tzung-Je Lee, Hoi Kam Lo, Shih-Ping Lin, Ron Hu
2005 J jnl
A multiparameter implantable microstimulator SOC.
IEEE Trans. Very Large Scale Integr. Syst.
Chua-Chin Wang, Tzung-Je Lee, Yu-Tzu Hsiao, U. Fat Chio, Chi-Chun Huang, J.-J. J. Chin, Ya-Hsin Hsueh
2004 — conf
High-PSR bias circuitry for NTSC sync separation.
ISCAS (1)
Chua-Chin Wang, Yih-Long Tseng, Tzung-Je Lee, Ron Hu