Tung-Chien Chen

50 papers A 2C 9Misc 3Journal 11Unranked 25
YearRankTypeTitle / Venue / Authors
2019 — conf
Heterogeneous Computing for Edge AI.
VLSI-DAT
Pei-Kuei Tsung, Tung-Chien Chen, Chien-Hung Lin, Chih-Yu Chang, Jih-Ming Hsu
2019 — conf
NeuroPilot: A Cross-Platform Framework for Edge-AI.
AICAS
Tung-Chien Chen, Wei-Ting Wang, Kloze Kao, Chia-Lin Yu, Code Lin, Shu-Hsin Chang, Pei-Kuei Tsung
2018 — conf
A 473 μW wireless 16-channel neural recording SoC with RF energy harvester.
VLSI-DAT
Kun-Ying Yeh, Yu-Jie Huang, Tung-Chien Chen, Liang-Gee Chen, Shey-Shi Lu
2014 Misc conf
Design and implementation of a low power spike detection processor for 128-channel spike sorting microsystem.
ICASSP
Tsung-Chuan Ma, Tung-Chien Chen, Liang-Gee Chen
2013 J jnl
Brain-Inspired Framework for Fusion of Multiple Depth Cues.
IEEE Trans. Circuits Syst. Video Technol.
Chung-Te Li, Yen-Chieh Lai, Chien Wu, Sung-Fang Tsai, Tung-Chien Chen, Shao-Yi Chien, Liang-Gee Chen
2013 C conf
Low-power multi-processor system architecture design for universal biomedical signal processing.
ISCAS
Li-Fang Cheng, Tung-Chien Chen, Liang-Gee Chen
2012 — conf
Architecture design of the multi-functional wavelet-based ECG microprocessor for realtime detection of abnormal cardiac events.
EMBC
Li-Fang Cheng, Tung-Chien Chen, Liang-Gee Chen
2012 — conf
Assessing normality of heart sound by matching pursuit residue with frequency-domain-based templates.
EMBC
Hong-Hui Chen, Tung-Chien Chen, Liang-Gee Chen
2012 — conf
Channel selection for epilepsy seizure prediction method based on machine learning.
EMBC
Nai-Fu Chang, Tung-Chien Chen, Cheng-Yi Chiang, Liang-Gee Chen
2012 C conf
Exploration of reusing the pre-recorded training data set to improve the supervised classifier for EEG-based motor-imagery brain computer interfaces.
ISCAS
Yun-Yu Chen, Tung-Chien Chen, Chien-Chung Chen, Hsin-I Liao, Luk-Ting Sio, Liang-Gee Chen
2012 — conf
Low power and high accuracy spike sorting microprocessor with on-line interpolation and re-alignment in 90nm CMOS process.
EMBC
Tung-Chien Chen, Tsung-Chuan Ma, Yun-Yu Chen, Liang-Gee Chen
2011 — conf
A 216fps 4096×2160p 3DTV set-top box SoC for free-viewpoint 3DTV applications.
ISSCC
Pei-Kuei Tsung, Pin-Chih Lin, Kuan-Yu Chen, Tzu-Der Chuang, Hsin-Jung Yang, Shao-Yi Chien, Li-Fu Ding, Wei-Yin Chen, Chih-Chi Cheng, Tung-Chien Chen, Liang-Gee Chen
2011 J jnl
Analysis and Design of On-sensor ECG Processors for Realtime Detection of Cardiac Anomalies Including VF, VT, and PVC.
J. Signal Process. Syst.
Hong-Hui Chen, Cheng-Yi Chiang, Tung-Chien Chen, Chien-Sheng Liu, Yu-Jie Huang, Shey-Shi Lu, Chii-Wann Lin, Liang-Gee Chen
2011 — conf
Cubic spline interpolation with overlapped window and data reuse for on-line Hilbert Huang transform biomedical microprocessor.
EMBC
Nai-Fu Chang, Cheng-Yi Chiang, Tung-Chien Chen, Liang-Gee Chen
2011 Misc conf
Design and implementation of cubic spline interpolation for spike sorting microsystems.
ICASSP
Tung-Chien Chen, Yun-Yu Chen, Tsung-Chuan Ma, Liang-Gee Chen
2011 — conf
Mobile energy expenditure tracking system based on heart rate and motion providing extra extensions for personalized care.
EMBC
Hong-Hui Chen, Yu-Hsin Chen, Tung-Chien Chen, Liang-Gee Chen
2011 Misc conf
Power estimation scheme for lowpower oriented biomedical SoC extended to very deep submicron technology.
ICASSP
Hong-Hui Chen, Tung-Chien Chen, Cheng-Yi Chiang, Liang-Gee Chen
2011 — conf
Robust heart rate measurement with phonocardiogram by on-line template extraction and matching.
EMBC
Yu-Hsin Chen, Hong-Hui Chen, Tung-Chien Chen, Liang-Gee Chen
2011 — conf
Seizure prediction based on classification of EEG synchronization patterns with on-line retraining and post-processing scheme.
EMBC
Cheng-Yi Chiang, Nai-Fu Chang, Tung-Chien Chen, Hong-Hui Chen, Liang-Gee Chen
2010 C conf
Accuracy and power tradeoff in spike sorting microsystems with cubic spline interpolation.
ISCAS
Yun-Yu Chen, Tung-Chien Chen, Liang-Gee Chen
2010 C conf
Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulator.
ISCAS
Yu-Hsin Chen, Tung-Chien Chen, Tsung-Hsueh Lee, Liang-Gee Chen
2009 C conf
128-channel Spike Sorting Processor with a Parallel-folding Structure in 90nm Process.
ISCAS
Tung-Chien Chen, Wentai Liu, Liang-Gee Chen
2009 — conf
A 212MPixels/s 4096×2160p multiview video encoder chip for 3D/quad HDTV applications.
ISSCC
Li-Fu Ding, Wei-Yin Chen, Pei-Kuei Tsung, Tzu-Der Chuang, Hsu-Kuang Chiu, Yu-Han Chen, Pai-Heng Hsiao, Shao-Yi Chien, Tung-Chien Chen, Ping-Chih Lin, Chia-Yu Chang, Liang-Gee Chen
2009 — conf
A biomedical multiprocessor SoC for closed-loop neuroprosthetic applications.
ISSCC
Tung-Chien Chen, Kuanfu Chen, Zhi Yang, Kimberly Cockerham, Wentai Liu
2009 J jnl
Algorithm and Architecture Design of Power-Oriented H.264/AVC Baseline Profile Encoder for Portable Devices.
IEEE Trans. Circuits Syst. Video Technol.
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen
2009 C conf
Closed-loop Eyelid Reanimation System with Real-time Blink Detection and Electrochemical Stimulation for Facial Nerve Paralysis.
ISCAS
Kuanfu Chen, Tung-Chien Chen, Kimberly Cockerham, Wentai Liu
2009 C conf
On-chip Principal Component Analysis with a Mean Pre-estimation Method for Spike Sorting.
ISCAS
Tung-Chien Chen, Kuanfu Chen, Wentai Liu, Liang-Gee Chen
2008 — conf
A 128-Channel 6mW Wireless Neural Recording IC with On-the-Fly Spike Sorting and UWB Tansmitter.
ISSCC
Moo Sung Chae, Wentai Liu, Zhi Yang, Tung-Chien Chen, Jungsuk Kim, Mohanasankar Sivaprakasam, Mehmet R. Yuce
2008 J jnl
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder.
J. Signal Process. Syst.
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen
2008 J jnl
VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC.
J. Signal Process. Syst.
Yi-Hau Chen, Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen
2007 J jnl
Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC.
IEEE Trans. Circuits Syst. Video Technol.
Tung-Chien Chen, Yu-Han Chen, Sung-Fang Tsai, Shao-Yi Chien, Liang-Gee Chen
2007 — conf
Low Power Cache Algorithm and Architecture Design for Fast Motion Estimation in H.264/AVC Encoder System.
ICASSP (2)
Chuan-Yuan Tsai, Chen-Han Chung, Yu-Han Chen, Tung-Chien Chen, Liang-Gee Chen
2007 — conf
Reconfigurable architecture for video applications.
SoCC
Chung-Jr Lian, Po-Chih Tseng, Tung-Chien Chen, Yu-Wei Chang, Liang-Gee Chen
2007 J jnl
Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC.
IEEE Trans. Circuits Syst. Video Technol.
Tung-Chien Chen, Chuan-Yung Tsai, Yu-Wen Huang, Liang-Gee Chen
2007 C conf
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint.
ISCAS
Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi Chien, Tung-Chien Chen, Liang-Gee Chen
2006 J jnl
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder.
IEEE Trans. Circuits Syst. Video Technol.
Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, Liang-Gee Chen
2006 J jnl
Analysis and architecture design of variable block-size motion estimation for H.264/AVC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ching-Yeh Chen, Shao-Yi Chien, Yu-Wen Huang, Tung-Chien Chen, Tu-Chih Wang, Liang-Gee Chen
2006 J jnl
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC.
IEEE Trans. Circuits Syst. II Express Briefs
Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Bing-Yu Hsieh, Liang-Gee Chen
2006 — conf
Architecture Design of Low Power Integer Motion Estimation for H. 264/AVC.
ICASSP (3)
Tung-Chien Chen, Yu-Han Chen, Sung-Fang Tsai, Liang-Gee Chen
2006 — conf
Hardware architecture design of an H.264/AVC video codec.
ASP-DAC
Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen
2006 A conf
Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile Encoder.
ICME
Chuan-Yung Tsai, Tung-Chien Chen, Liang-Gee Chen
2006 C conf
Low power and power aware fractional motion estimation of H.264/AVC for mobile applications.
ISCAS
Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen
2006 A conf
Power-Scalable Algorithm and Reconfigurable Macro-Block Pipelining Architecture of H.264 Encoder for Mobile Application.
ICME
Yu-Han Chen, Tung-Chien Chen, Liang-Gee Chen
2005 J jnl
Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder.
IEEE Trans. Circuits Syst. Video Technol.
Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen
2005 — conf
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos.
ISCAS (3)
To-Wei Chen, Yu-Wen Huang, Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen
2005 — conf
Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC.
ISCAS (2)
Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Chao-Tsung Huang, Liang-Gee Chen
2004 — conf
Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture.
ISCAS (2)
Tung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen
2004 — conf
Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC.
ICASSP (5)
Tung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen
2004 — conf
Hardware architecture design for H.264/AVC intra frame coder.
ISCAS (2)
Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen
2003 — conf
Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile.
ISCAS (2)
Wei-Min Chao, Tung-Chien Chen, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen