Tullio Vardanega

140 papers A* 4A 8B 16C 11Misc 30Journal 27Unranked 42

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	A Teaching and Learning Oriented Decomposition of Debugging Subskills Informed by Cognitive Load Theory. ISSEP Gabriele Pozzan, Andreas Bollin, Tullio Vardanega
2025	J	`jnl`	Age-related effects of coding interventions. Int. J. Child Comput. Interact. Chiara Montuori, Lucia Ronconi, Gabriele Pozzan, Costanza Padova, Tullio Vardanega, Barbara Arfé
2025	J	`jnl`	Explainable Predictive Factors for Inter-Agency Partnership Success. IEEE Access Nicola Drago, Gonçalo Afonso Braz, Tullio Vardanega
2025	J	`jnl`	Live migration of compiled Wasm modules across the Compute Continuum. J. Syst. Archit. Edoardo Tinto, L. Marchiori, Tullio Vardanega
2025	—	`conf`	On the Use of Tracing to Diagnose Misconceptions About Iteration. ISSEP Gabriele Pozzan, Costanza Padova, Chiara Montuori, Barbara Arfé, Tullio Vardanega
2024	A	`conf`	A runtime infrastructure for the Continuum of Computing. HPDC Edoardo Tinto, Tullio Vardanega
2024	—	`conf`	Experimental Analysis of First-Grade Students' Block-Based Programming Problem Solving Processes. ITiCSE (1) Gabriele Pozzan, Costanza Padova, Chiara Montuori, Barbara Arfé, Tullio Vardanega
2024	J	`jnl`	Providing spatial isolation for Mixed-Criticality Systems. J. Syst. Archit. Edoardo Tinto, Tullio Vardanega
2023	—	`conf`	A Systematic Mapping Study of Italian Research on Workflows. SC Workshops Marco Aldinucci, Elena Maria Baralis, Valeria Cardellini, Iacopo Colonnelli, Marco Danelutto, Sergio Decherchi, Giuseppe Di Modica, Luca Ferrucci, Marco Gribaudo, Francesco Iannone, Marco Lapegna, Doriana Medic, Giuseppa Muscianisi, Francesca Righetti, Eva Sciacca, Nicola Tonellotto, Mauro Tortonesi, Paolo Trunfio, Tullio Vardanega
2023	—	`conf`	Learning Iteration for Grades 2-3: Puzzles vs. UMC in Code.org. SIGCSE (2) Enrico Nardelli, Francesco Lacchia, Renzo Davoli, Michael Lodi, Marco Sbaraglia, Veronica Rossano, Enrichetta Gentile, Violetta Lonati, Mattia Monga, Anna Morpurgo, Luca Forlizzi, Giovanna Melideo, Sara Capecchi, Ilenia Fronza, Tullio Vardanega
2022	J	`jnl`	Automatic Distributed Deep Learning Using Resource-Constrained Edge Devices. IEEE Internet Things J. Alberto Gutierrez-Torre, Kiyana Bahadori, Shuja Ur Rehman Baig, Waheed Iqbal, Tullio Vardanega, Josep Lluís Berral, David Carrera
2022	J	`jnl`	Evaluating a multicore Mixed-Criticality System implementation against a temporal isolation kernel. J. Syst. Archit. Mattia Bottaro, Tullio Vardanega
2022	J	`jnl`	Rafting multiplayer video games. Softw. Pract. Exp. Gabriele Pozzan, Tullio Vardanega
2021	J	`jnl`	Removing bias from the judgment day: A Ravenscar-based toolbox for quantitative comparison of EDF-to-RM uniprocessor scheduling. J. Syst. Archit. Dilan Perale, Tullio Vardanega
2020	J	`jnl`	A new start: Introducing the journal-track proceedings of the 24th Ada-Europe conference on reliable software technologies. J. Syst. Archit. Tullio Vardanega
2020	J	`jnl`	The effects of coding on children's planning and inhibition skills. Comput. Educ. Barbara Arfé, Tullio Vardanega, Lucia Ronconi
2019	—	`conf`	A Little Look Outside of the Box. MDE4IoT/ModComp@MoDELS Tullio Vardanega
2019	J	`jnl`	Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey. ACM Comput. Surv. Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Tullio Vardanega
2019	—	`conf`	The Scalability Challenge of Ethereum: An Initial Quantitative Analysis. SOSE Mirko Bez, Giacomo Fornari, Tullio Vardanega
2018	B	`conf`	A two-staged capstone project to foster university-business dialogue. ITiCSE Tullio Vardanega, Monica Fedeli
2018	C	`conf`	Designing and Implementing Elastically Scalable Services - A State-of-the-art Technology Review. CLOSER Kiyana Bahadori, Tullio Vardanega
2018	—	`conf`	DevOps Meets Dynamic Orchestration. DEVOPS Kiyana Bahadori, Tullio Vardanega
2018	J	`jnl`	Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262. IEEE Trans. Reliab. Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernández, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega
2018	—	`conf`	In Pursuit of Architectural Agility: Experimenting with Microservices. SCC Tullio Vardanega, Alberto Simioni
2018	Misc	`conf`	Microservice-Based Agile Architectures: An Opportunity for Specialized Niche Technologies. Ada-Europe Stefano Munari, Sebastiano Valle, Tullio Vardanega
2018	J	`jnl`	Reconciling Time Predictability and Performance in Future Computing Systems. IEEE Des. Test Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernández, Tullio Vardanega, Guillem Bernat
2017	J	`jnl`	Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. IEEE Trans. Computers Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
2017	A	`conf`	EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application. RTAS Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
2017	—	`conf`	On uses of extreme value theory fit for industrial-quality WCET analysis. SIES Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
2017	Misc	`conf`	Ravenscar-EDF: Comparative Benchmarking of an EDF Variant of a Ravenscar Runtime. Ada-Europe Paolo Carletto, Tullio Vardanega
2017	Misc	`conf`	Software Time Reliability in the Presence of Cache Memories. Ada-Europe Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-askasua, Enrico Mezzetti, Tullio Vardanega, Francisco J. Cazorla
2016	C	`conf`	An automated framework for the timing analysis of applications for an automotive multicore processor. ETFA Davide Compagnin, Tullio Vardanega
2016	—	`conf`	Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore. SAFECOMP Workshops Irune Agirre, Mikel Azkarate-askasua, Asier Larrucea, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla
2016	J	`jnl`	Fitting processor architectures for measurement-based probabilistic timing analysis. Microprocess. Microsystems Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernández, Andrea Gianarro, Ian Broster, Francisco J. Cazorla
2016	Misc	`conf`	Lessons Learned in a Journey Toward Correct-by-Construction Model-Based Development. Ada-Europe Laura Baracchi, Silvia Mazzini, Stefano Puri, Tullio Vardanega
2016	—	`conf`	Measurement-Based Timing Analysis of the AURIX Caches. WCET Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
2016	—	`conf`	Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis. WCET Enrique Díaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-askasua, Tullio Vardanega, Francisco J. Cazorla
2016	C	`conf`	PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. DSD Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma
2015	—	`conf`	A Safety Concept for a Railway Mixed-Criticality Embedded System Based on Multicore Partitioning. CIT/IUCC/DASC/PICom Irune Agirre, Mikel Azkarate-askasua, Asier Larrucea, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla
2015	Misc	`conf`	A time-composable operating system for the Patmos processor. SAC Marco Ziccardi, Martin Schoeberl, Tullio Vardanega
2015	A	`conf`	EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis. RTSS Marco Ziccardi, Enrico Mezzetti, Tullio Vardanega, Jaume Abella, Francisco J. Cazorla
2015	B	`conf`	Experimental Evaluation of Optimal Schedulers Based on Partitioned Proportionate Fairness. ECRTS Davide Compagnin, Enrico Mezzetti, Tullio Vardanega
2015	C	`conf`	IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis. DSD Irune Agirre, Mikel Azkarate-askasua, Carles Hernández, Jaume Abella, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla
2015	A*	`conf`	Increasing confidence on measurement-based contention bounds for real-time round-robin buses. DAC Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
2015	Misc	`conf`	Introduction to partial time composability for COTS multicores. SAC Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
2015	J	`jnl`	Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems. Leibniz Trans. Embed. Syst. Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
2015	—	`conf`	Reconciling Service Orientation with the Cloud. SOSE Valentino Baraldo, Alberto Zuccato, Tullio Vardanega
2015	Misc	`ed.`	Reliable Software Technologies - Ada-Europe 2015 - 20th Ada-Europe International Conference on Reliable Software Technologies, Madrid Spain, June 22-26, 2015, Proceedings Ada-Europe Juan Antonio de la Puente, Tullio Vardanega
2015	A*	`conf`	Resource usage templates and signatures for COTS multicore processors. DAC Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
2015	C	`conf`	Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors. ISORC Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla
2015	—	`conf`	Software-enforced Interconnect Arbitration for COTS Multicores. WCET Marco Ziccardi, Alessandro Cornaglia, Enrico Mezzetti, Tullio Vardanega
2015	A	`conf`	Timing analysis of an avionics case study on complex hardware/software platforms. DATE Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla
2015	—	`conf`	WCET analysis methods: Pitfalls and challenges on their trustworthiness. SIES Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega
2014	J	`jnl`	A component-based process with separation of concerns for the development of embedded real-time software systems. J. Syst. Softw. Marco Panunzio, Tullio Vardanega
2014	J	`jnl`	An architectural approach with separation of concerns to address extra-functional requirements in the development of embedded real-time software systems. J. Syst. Archit. Marco Panunzio, Tullio Vardanega
2014	—	`conf`	Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art. WCET Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla
2014	B	`conf`	Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA. ECRTS Jaume Abella, Eduardo Quiñones, Franck Wartel, Tullio Vardanega, Francisco J. Cazorla
2014	—	`conf`	Implementing Elastic Capacity in a Service-Oriented PaaS. ESOCC Workshops Alberto Zuccato, Tullio Vardanega
2014	C	`conf`	Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture. DSD Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla
2014	B	`conf`	Putting RUN into Practice: Implementation and Evaluation. ECRTS Davide Compagnin, Enrico Mezzetti, Tullio Vardanega
2014	Misc	`ed.`	Reliable Software Technologies - Ada-Europe 2014, 19th Ada-Europe International Conference on Reliable Software Technologies, Paris, France, June 23-27, 2014. Proceedings Ada-Europe Laurent George, Tullio Vardanega
2014	Misc	`conf`	SPRINT: Extending RUN to Schedule Sporadic Tasks. RTNS Andrea Baldovin, Geoffrey Nelissen, Tullio Vardanega, Eduardo Tovar
2014	Misc	`conf`	Supporting Global Resource Sharing in RUN-scheduled Multiprocessor Systems. RTNS Luca Bonato, Enrico Mezzetti, Tullio Vardanega
2013	A	`conf`	A rapid cache-aware procedure positioning optimization to favor incremental development. IEEE Real-Time and Embedded Technology and Applications Symposium Enrico Mezzetti, Tullio Vardanega
2013	C	`conf`	Achieving timing composability with measurement-based probabilistic timing analysis. ISORC Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
2013	—	`conf`	Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources. WCET Leonidas Kosmidis, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
2013	B	`conf`	Cross-Domain Reuse: Lessons Learned in a Multi-project Trajectory. ICSR Silvia Mazzini, John M. Favaro, Tullio Vardanega
2013	Misc	`conf`	Kernel-level time composability for avionics applications. SAC Andrea Baldovin, Andrea Graziano, Enrico Mezzetti, Tullio Vardanega
2013	Misc	`conf`	Limited preemptive scheduling of non-independent task sets. EMSOFT Andrea Baldovin, Enrico Mezzetti, Tullio Vardanega
2013	—	`conf`	Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study. SIES Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quiñones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla
2013	B	`conf`	On Software Reference Architectures and Their Application to the Space Domain. ICSR Marco Panunzio, Tullio Vardanega
2013	J	`jnl`	PROARTIS: Probabilistically Analyzable Real-Time Systems. ACM Trans. Embed. Comput. Syst. Francisco J. Cazorla, Eduardo Quiñones, Tullio Vardanega, Liliana Cucu, Benoit Triquet, Guillem Bernat, Emery D. Berger, Jaume Abella, Franck Wartel, Michael Houston, Luca Santinelli, Leonidas Kosmidis, Code Lo, Dorin Maxim
2013	C	`conf`	Supporting industrial use of probabilistic timing analysis with explicit argumentation. INDIN Zoë R. Stephenson, Jaume Abella, Tullio Vardanega
2013	Misc	`conf`	Towards a Time-Composable Operating System. Ada-Europe Andrea Baldovin, Enrico Mezzetti, Tullio Vardanega
2013	—	`conf`	Upper-bounding Program Execution Time with Extreme Value Theory. WCET Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, Jaume Abella
2012	—	`ed.`	12th International Workshop on Worst-Case Execution Time Analysis, WCET 2012, Pisa, Italy, July 10, 2012 WCET Tullio Vardanega
2012	—	`conf`	A Time-composable Operating System. WCET Andrea Baldovin, Enrico Mezzetti, Tullio Vardanega
2012	Misc	`conf`	Ada Ravenscar Code Archetypes for Component-Based Development. Ada-Europe Marco Panunzio, Tullio Vardanega
2012	—	`conf`	An MDE approach to address synchronization needs in component-based real-time systems. CBSE Patricia López Martínez, Tullio Vardanega
2012	A*	`conf`	CHESS: a model-driven engineering tool environment for aiding the development of complex industrial systems. ASE Antonio Cicchetti, Federico Ciccozzi, Silvia Mazzini, Stefano Puri, Marco Panunzio, Alessandro Zovi, Tullio Vardanega
2012	Misc	`conf`	Handling Synchronization Requirements under Separation of Concerns in Model-Driven Component-Based Development. Ada-Europe Patricia López Martínez, Tullio Vardanega
2012	B	`conf`	Measurement-Based Probabilistic Timing Analysis for Multi-path Programs. ECRTS Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quiñones, Francisco J. Cazorla
2012	—	`conf`	PaaSSOA: An Open PaaS Architecture for Service Oriented Applications. ESOCC Claudio Guidi, Paolo Anedda, Tullio Vardanega
2012	C	`conf`	Towards a New Paas Architecture Generation. CLOSER Claudio Guidi, Paolo Anedda, Tullio Vardanega
2011	C	`conf`	Measuring I/O Performance in Xen Paravirtualization Virtual Machines. CLOSER Giovanni Giacobbi, Tullio Vardanega
2011	J	`jnl`	Pitfalls and misconceptions in component-oriented approaches for real-time embedded systems: lessons learned and solutions. SIGBED Rev. Marco Panunzio, Tullio Vardanega
2011	Misc	`ed.`	Reliable Software Technologies - Ada-Europe 2011 - 16th Ada-Europe International Conference on Reliable Software Technologies, Edinburgh, UK, June 20-24, 2011. Proceedings Ada-Europe Alexander B. Romanovsky, Tullio Vardanega
2010	—	`conf`	A Component Model for On-board Software Applications. EUROMICRO-SEAA Marco Panunzio, Tullio Vardanega
2010	—	`conf`	A Multi-Agent System for the Automated Handling of Experimental Protocols in Biological Laboratories. WOA Alessandro Maccagnan, Tullio Vardanega, Erika Feltrin, Giorgio Valle, Mauro Riva, Nicola Cannata
2010	—	`conf`	Bounding the Effects of Resource Access Protocols on Cache Behavior. WCET Enrico Mezzetti, Marco Panunzio, Tullio Vardanega
2010	Misc	`conf`	Cache-Aware Development of High-Integrity Systems. Ada-Europe Enrico Mezzetti, Adam Betts, José F. Ruiz, Tullio Vardanega
2010	J	`jnl`	Ensuring Correctness in the Specification and Handling of Non-Functional Attributes in High-Integrity Real-Time Embedded Systems. IEEE Trans. Ind. Informatics Daniela Cancila, Roberto Passerone, Tullio Vardanega, Marco Panunzio
2010	Misc	`conf`	Preservation of Timing Properties with the Ada Ravenscar Profile. Ada-Europe Enrico Mezzetti, Marco Panunzio, Tullio Vardanega
2010	Misc	`ed.`	Reliable Software Technologiey - Ada-Europe 2010, 15th Ada-Europe International Conference on Reliable Software Technologies, Valencia, Spain, June 14-18, 2010. Proceedings Ada-Europe Jorge Real, Tullio Vardanega
2010	B	`conf`	Towards a Cache-Aware Development of High Integrity Real-Time Systems. RTCSA Enrico Mezzetti, Tullio Vardanega
2009	A	`conf`	An MDE methodology for the development of high-integrity real-time systems. DATE Silvia Mazzini, Stefano Puri, Tullio Vardanega
2009	B	`conf`	On Component-Based Development and High-Integrity Real-Time Systems. RTCSA Marco Panunzio, Tullio Vardanega
2009	C	`conf`	Property Preservation and Composition with Guarantees: From ASSERT to CHESS. ISORC Tullio Vardanega
2009	Misc	`conf`	Requirements on the Target Programming Language for High-Integrity MDE. Ada-Europe Alessandro Zovi, Tullio Vardanega
2008	B	`conf`	Fitting Schedulability Analysis Theory into Model-Driven Engineering. ECRTS Matteo Bordin, Marco Panunzio, Tullio Vardanega
2008	Misc	`ed.`	Reliable Software Technologies - Ada-Europe 2008, 13th Ada-Europe International Conference on Reliable Software Technologies, Venice, Italy, June 16-20, 2008. Proceedings Ada-Europe Fabrice Kordon, Tullio Vardanega
2007	Misc	`conf`	A Metamodel-Driven Process Featuring Advanced Model-Based Timing Analysis. Ada-Europe Marco Panunzio, Tullio Vardanega
2007	—	`conf`	Ada 2005 code patterns for metamodel-based code generation. IRTAW José Antonio Pulido, Juan Antonio de la Puente, Jérôme Hugues, Matteo Bordin, Tullio Vardanega
2007	B	`conf`	An Approach to the Timing Analysis of Hierarchical Systems. RTCSA Marco Panunzio, Tullio Vardanega
2007	Misc	`conf`	Correctness by Construction for High-Integrity Real-Time Systems: A Metamodel-Driven Approach. Ada-Europe Matteo Bordin, Tullio Vardanega
2007	—	`conf`	Introduction. IRTAW Tullio Vardanega, José F. Ruiz
2007	—	`conf`	Real-time Java from an automated code generation perspective. JTRES Matteo Bordin, Tullio Vardanega
2006	B	`conf`	A UML2 Profile for Reusable and Verifiable Software Components for Real-Time Applications. ICSR Vaclav Cechticky, Martin Egli, Alessandro Pasetti, O. Rohlik, Tullio Vardanega
2006	Misc	`conf`	Hierarchical Scheduling with Ada 2005. Ada-Europe José Antonio Pulido, Santiago Urueña, Juan Zamorano, Tullio Vardanega, Juan Antonio de la Puente
2006	B	`conf`	Property-Preserving Reuse-Geared Approach to Model-Driven Development. RTCSA Tullio Vardanega
2005	Misc	`conf`	A New Strategy for the HRT-HOOD to Ada Mapping. Ada-Europe Matteo Bordin, Tullio Vardanega
2005	B	`conf`	Automated Model-Based Generation of Ravenscar-Compliant Source Code. ECRTS Matteo Bordin, Tullio Vardanega
2005	J	`jnl`	On the Dynamic Semantics and the Timing Behavior of Ravenscar Kernels. Real Time Syst. Tullio Vardanega, Juan Zamorano, Juan Antonio de la Puente
2005	Misc	`ed.`	Reliable Software Technology - Ada-Europe 2005, 10th Ada-Europe International Conference on Reliable Software Technologies, York, UK, June 20-24, 2005, Proceedings Ada-Europe Tullio Vardanega, Andy J. Wellings
2004	—	`conf`	Component-Based Real-Time Design: Mapping HRT-HOOD to UML. EUROMICRO Tullio Vardanega, Marco Di Natale, Silvia Mazzini, Massimo D'Alessandro
2003	Misc	`conf`	HRT-UML: Taking HRT-HOOD onto UML. Ada-Europe Silvia Mazzini, Massimo D'Alessandro, Marco Di Natale, Andrea Domenici, Giuseppe Lipari, Tullio Vardanega
2003	B	`conf`	Issues in Mapping HRT-HOOD to UML. ECRTS Silvia Mazzini, Massimo D'Alessandro, Marco Di Natale, Giuseppe Lipari, Tullio Vardanega
2003	—	`ed.`	Proceedings of the 12th International Workshop on Real-Time Ada, IRTAW 2003, Viana do Castelo, Portugal, September 15-19, 2003 IRTAW Tullio Vardanega
2003	—	`conf`	Ravenscar design patterns?: reflections on use of the Ravenscar profile. IRTAW Tullio Vardanega
2003	—	`conf`	Report of session: current real-time AIs. IRTAW Michael González Harbour, Tullio Vardanega
2003	—	`conf`	Report of session: flexible scheduling in Ada. IRTAW Alan Burns, Andy J. Wellings, Tullio Vardanega
2003	—	`conf`	Report of session: generating new AIs. IRTAW Alan Burns, Tullio Vardanega
2003	—	`conf`	Session summary: the future of IRTAW. IRTAW Tullio Vardanega, Luís Miguel Pinho
2002	J	`jnl`	Engineering software reuse for on-board embedded real-time systems. Softw. Pract. Exp. Tullio Vardanega, Gert Caspersen
2002	—	`conf`	Report of session: language changes for scheduling, modeling and analysis. IRTAW Andy J. Wellings, Tullio Vardanega
2002	Misc	`conf`	Using Object Orientation in High Integrity Applications: A Case Study. Ada-Europe Alejandro Alonso, Roberto López, Tullio Vardanega, Juan Antonio de la Puente
2001	Misc	`conf`	An Application Case for Ravenscar Technology: Porting OBOSS to GNAT/ORK. Ada-Europe Tullio Vardanega, Rodrigo García, Juan Antonio de la Puente
2000	—	`conf`	Report of session: analysis of the J consortium real-time Java proposal. IRTAW Brian Dobbing, Tullio Vardanega
2000	—	`conf`	Using the Ravenscar profile for space applications: the OBOSS case. IRTAW Tullio Vardanega, Gert Caspersen
1999	Misc	`conf`	A Case Study in the Reuse of On-board Embedded Real-Time Software. Ada-Europe Tullio Vardanega, Gert Caspersen, Jan Storbank Pedersen
1999	J	`jnl`	A Software Process for the Construction of Predictable On-Board Embedded Real-Time Systems. Softw. Pract. Exp. Tullio Vardanega, Jan van Katwijk
1999	J	`jnl`	On the Distribution of Control Functions in New-Generation On-Board Embedded Real-Time Systems. Parallel Distributed Comput. Pract. Tullio Vardanega
1998	J	`jnl`	On the Construction of New-Generation On-Board Real-Time Systems. Integr. Comput. Aided Eng. Tullio Vardanega
1998	J	`jnl`	Productive engineering of predictable embedded real-time systems: the road to maturity. Inf. Softw. Technol. Tullio Vardanega, Jan van Katwijk
1997	—	`conf`	Tasking profiles (session summary). IRTAW Alan Burns, Ted Baker, Tullio Vardanega
1996	A	`conf`	Tool support for the construction of statically analysable hard real-time Ada systems. RTSS Tullio Vardanega
1995	—	`conf`	On the Development of Fault-Tolerant On-Board Control Software and its Evaluation by Fault Injection. FTCS Tullio Vardanega, P. David, J.-F. Chane, Wolfgang R. Mader, R. Messaros, Jean Arlat
1994	A*	`conf`	Experience with the Development of Hard Real-Time Embedded Ada Software. ICSE Tullio Vardanega
1993	A	`conf`	The use of preemptive priority-based scheduling for space applications. RTSS C. M. Bailey, E. Fyfe, Tullio Vardanega, Andy J. Wellings
1991	B	`conf`	An operating system suited for integrated broadband communications networks. LCN Tullio Vardanega