Tudor Murgan - RankMe

35 papers A 4B 2C 6Misc 1Journal 3Unranked 18

Year	Rank	Type	Title / Venue / Authors
2009	J	`jnl`	Low-Power Coding for Networks-on-Chip with Virtual Channels. J. Low Power Electron. Alberto García Ortiz, Leandro Soares Indrusiak, Tudor Murgan, Manfred Glesner
2008	A	`conf`	An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs. DATE Petru Bogdan Bacinschi, Tudor Murgan, Klaus Koch, Manfred Glesner
2008	—	`ch.`	Hardware Based Rapid Prototyping. Wiley Encyclopedia of Computer Science and Engineering Manfred Glesner, Tudor Murgan, Thomas Hollstein
2008	—	`conf`	PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels. PATMOS Alberto García Ortiz, Leandro Soares Indrusiak, Tudor Murgan, Manfred Glesner
2008	C	`conf`	Process variations aware robust on-chip bus architecture synthesis for MPSoCs. ISCAS Sujan Pandey, Rolf Drechsler, Tudor Murgan, Manfred Glesner
2007	—	`conf`	Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling. ReCoSoC Tudor Murgan, Andre Guntoro, Heiko Hinkelmann, Petru Bogdan Bacinschi, Manfred Glesner
2007	—	`conf`	On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication. ReCoSoC Heiko Hinkelmann, Tudor Murgan, Guifang Liu, Peter Zipf, Manfred Glesner
2007	—	`conf`	On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects. PATMOS Tudor Murgan, Petru Bogdan Bacinschi, Sujan Pandey, Alberto García Ortiz, Manfred Glesner
2007	J	`jnl`	Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems. J. Low Power Electron. Alberto García Ortiz, Tudor Murgan, Manfred Glesner
2006	A	`conf`	A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects. ICCAD Tudor Murgan, Massoud Momeni, Alberto García Ortiz, Manfred Glesner
2006	A	`conf`	A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits. DATE Oliver Soffke, Peter Zipf, Tudor Murgan, Manfred Glesner
2006	C	`conf`	Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis. VLSI-SoC Sujan Pandey, Tudor Murgan, Manfred Glesner
2006	—	`conf`	Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance. PATMOS Tudor Murgan, Petru Bogdan Bacinschi, Alberto García Ortiz, Manfred Glesner
2006	C	`conf`	Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters. VLSI-SoC Tudor Murgan, Oliver Mitea, Sujan Pandey, Petru Bogdan Bacinschi, Manfred Glesner
2005	—	`conf`	A linear model for high-level delay estimation in VDSM on-chip interconnects. ISCAS (2) Alberto García Ortiz, Tudor Murgan, Mihail Petrov, Manfred Glesner
2005	—	`conf`	Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport Networks. ReCoSoC Tudor Murgan, Abdulfattah Mohammad Obeid, Andre Guntoro, Peter Zipf, Manfred Glesner, Ulrich Heinkel
2005	—	`conf`	Functional modeling techniques for a wireless LAN OFDM transceiver. ISCAS (4) A. Petrov, Tudor Murgan, Peter Zipf, Manfred Glesner
2005	—	`conf`	HW/SW design and realization of a size-reconfigurable DCT accelerator. ICECS Abdulfattah Mohammad Obeid, Tudor Murgan, Abdelouahid Taadou, Manfred Glesner
2005	—	`conf`	Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. SAMOS Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf
2004	—	`conf`	Accurate capture of timing parameters in inductively-coupled on-chip interconnects. SBCCI Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis
2004	—	`conf`	Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing. Conf. Computing Frontiers Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner
2004	—	`conf`	Dynamic power optimization of the trace-back process for the Viterbi algorithm. ISCAS (2) Mihail Petrov, Tudor Murgan, Abdulfattah Mohammad Obeid, Cristian Chitu, Peter Zipf, Jörg Brakensiek, Manfred Glesner
2004	—	`conf`	Flexible Overhead Processing Architectures for G.709 Optical Transport Networks. MBMV Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel
2004	—	`conf`	Moment-Based Estimation of Switching Activity for Correlated Distributions. PATMOS Alberto García Ortiz, Tudor Murgan, Manfred Glesner
2004	—	`conf`	On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects. PATMOS Tudor Murgan, Alberto García Ortiz, Clemens Schlachta, Heiko Zimmer, Mihail Petrov, Manfred Glesner
2004	—	`conf`	Reconfigurable platforms for ubiquitous computing. Conf. Computing Frontiers Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan
2004	B	`conf`	The XPP Architecture and Its Co-simulation Within the Simulink Environment. FPL Mihail Petrov, Tudor Murgan, Frank May, Martin Vorbach, Peter Zipf, Manfred Glesner
2003	C	`conf`	An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders. VLSI-SOC Mihail Petrov, Abdulfattah Mohammad Obeid, Tudor Murgan, Peter Zipf, Jörg Brakensiek, Bernard Ölkrug, Manfred Glesner
2003	C	`conf`	Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems. IEEE International Workshop on Rapid System Prototyping Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Juan Jesús Ocampo Hidalgo, Manfred Glesner
2003	B	`conf`	Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. FPL Tudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek
2003	J	`jnl`	Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems. Des. Autom. Embed. Syst. Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner
2003	A	`conf`	Moment-Based Power Estimation in Very Deep Submicron Technologies. ICCAD Alberto García Ortiz, Lukusa D. Kabulepa, Tudor Murgan, Manfred Glesner
2003	Misc	`conf`	Transition Activity Estimation for General Correlated Data Distributions. VLSI Design Alberto García Ortiz, Tudor Murgan, Manfred Glesner
2002	—	`conf`	Power Consumption in Point-to-Point Interconnect Architectures. SBCCI Alberto García Ortiz, Tudor Murgan, Leandro Soares Indrusiak, Manfred Glesner
2002	C	`conf`	Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System. IEEE International Workshop on Rapid System Prototyping Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner